linux-kernel - Re: [PATCH v7 00/17] Introduce ACPI for ARM64 based on ACPI 5.1

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <20150116153320.GU7091@arm.com>
Date:	Fri, 16 Jan 2015 15:33:20 +0000
From:	Will Deacon <will.deacon@....com>
To:	Arnd Bergmann <arnd@...db.de>
Cc:	"linux-arm-kernel@...ts.infradead.org" 
	<linux-arm-kernel@...ts.infradead.org>,
	Tom Lendacky <thomas.lendacky@....com>,
	Mark Rutland <Mark.Rutland@....com>,
	linaro-acpi <linaro-acpi@...ts.linaro.org>,
	Catalin Marinas <Catalin.Marinas@....com>,
	Yijing Wang <wangyijing@...wei.com>,
	Rob Herring <robh@...nel.org>,
	Lorenzo Pieralisi <Lorenzo.Pieralisi@....com>,
	Timur Tabi <timur@...eaurora.org>,
	ACPI Devel Mailing List <linux-acpi@...r.kernel.org>,
	"grant.likely@...aro.org" <grant.likely@...aro.org>,
	Charles Garcia-Tobin <Charles.Garcia-Tobin@....com>,
	"phoenix.liyi@...wei.com" <phoenix.liyi@...wei.com>,
	Robert Richter <rric@...nel.org>,
	Jason Cooper <jason@...edaemon.net>,
	Marc Zyngier <Marc.Zyngier@....com>,
	"jcm@...hat.com" <jcm@...hat.com>, Mark Brown <broonie@...nel.org>,
	Bjorn Helgaas <bhelgaas@...gle.com>,
	"graeme.gregory@...aro.org" <graeme.gregory@...aro.org>,
	Randy Dunlap <rdunlap@...radead.org>,
	"Rafael J. Wysocki" <rjw@...ysocki.net>,
	Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
	"hanjun.guo@...aro.org" <hanjun.guo@...aro.org>,
	"suravee.suthikulpanit@....com" <suravee.suthikulpanit@....com>,
	Sudeep Holla <Sudeep.Holla@....com>,
	Olof Johansson <olof@...om.net>
Subject: Re: [PATCH v7 00/17] Introduce ACPI for ARM64 based on ACPI 5.1

On Fri, Jan 16, 2015 at 03:14:13PM +0000, Arnd Bergmann wrote:
> On Friday 16 January 2015 14:55:45 Will Deacon wrote:
> > On Fri, Jan 16, 2015 at 02:45:30PM +0000, Tom Lendacky wrote:
> > > I have tested ACPI-enablement patches for the amd-xgbe/amd-xgbe-phy
> > > drivers that I'm about to submit upstream with the V7 patch series
> > > on the AMD Seattle server platform. There does not appear to be support
> > > for the _CCA attribute in this patch series. The amd-xgbe driver will
> > > setup the device domain and cache attributes based on the presence of
> > > this attribute, but it requires the arch support to assign the proper
> > > DMA operations in order for it to all work correctly.
> > > 
> > > Overriding the _CCA attribute in the driver, I was able to successfully
> > > test the driver and this patch series.
> > 
> > Hopefully this will all be addressed when the IORT parts of ACPI have
> > settled down (the current proposal allows for these attributes to be
> > described as well as their interaction with things like IOMMUs).
> > 
> > In the meantime, are you falling back to non-coherent DMA? If so, what
> > attributes have you settled on? We need to be really careful not to
> > corrupt data during cache invalidatation when mapping a non-coherent
> > buffer for the CPU.
> 
> I think in case of ACPI we should use cache-coherent as the default,
> as this is what all servers will use for DMA masters.

I don't agree. The dma-coherent we have for device-tree isn't nearly
expressive enough for the kind of things we want to describe and there's
no reason to make the same mistake in ACPI, especially as it *is* being
addressed by IORT. If we run with _CCA, then we're going to be stuck
supporting something that isn't fit for purpose and which will likely be
abused to describe both fixed features of the system and software
configuration preferences. It also opens up a can of worms if we have to
support a mixture of _CCA and IORT in the future.

Or are you suggesting that we ignore _CCA and just assume cache-coherency?
In that case, how do we support systems that aren't cache coherent, where
not being cache coherent includes devices that require either device or
IOMMU configuration to enable cacheable transactions?

Will
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/