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Message-ID: <20150122084244.GP22024@x1>
Date: Thu, 22 Jan 2015 08:42:44 +0000
From: Lee Jones <lee.jones@...aro.org>
To: Javier Martinez Canillas <javier.martinez@...labora.co.uk>
Cc: Olof Johansson <olof@...om.net>,
Doug Anderson <dianders@...omium.org>,
Bill Richardson <wfrichar@...omium.org>,
Simon Glass <sjg@...gle.com>,
Gwendal Grignou <gwendal@...gle.com>,
Jonathan Corbet <corbet@....net>,
linux-samsung-soc@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH RESEND v2 3/7] mfd: cros_ec: Add cros_ec_lpc driver for
x86 devices
On Tue, 20 Jan 2015, Javier Martinez Canillas wrote:
> Hello Lee,
>
> On 01/20/2015 05:34 PM, Lee Jones wrote:
> >>
> >> So, the Embedded Controller driver (drivers/mfd/cros_ec.c) falls into that
> >> category and in fact has been in the mfd driver for a long time. Now, if
> >> an mfd device support different type of buses (e.g: i2c, spi, etc) I see
> >> that both the core driver and the driver for the transport method are
> >> in the drivers/mfd directory. As an example:
> >>
> >> drivers/mfd/arizona-{core,i2c,spi}.c
> >> drivers/mfd/da9052-{core,i2c,spi}.c
> >> drivers/mfd/mc13xxx-{core,i2c,spi}.c
> >> drivers/mfd/tps65912-{core,i2c,spi}.c
> >> drivers/mfd/wm831x-{core,i2c,spi,otp}.c
> >>
> >> In the cros_ec case, we already have drivers/mfd/cros_ec_{i2c,spi}.c so
> >> since the Low Pin Count is another transport method I thought that this
> >> driver belonged to the drivers/mfd directory.
> >>
> >> Now, all those drivers may be wrong and the buses don't belong to the mfd
> >> subsystem but then I think we need to document that since it seems that is
> >> the correct way to do it just by looking at the other drivers.
> >
> > I don't think the drivers you mentioned above do anything practical.
> > For instance, they are not SPI/IC2/etc drivers. They should only
> > offer some abstraction layers which are used to communicate with the
> > device. The driver you are submitting looks a lot more like a device
> > driver, which should live somewhere else. Don't ask me where though,
> > I'm not even sure what a Low Pin Controller does.
> >
>
> The driver added by $subject doesn't really do anything practical either.
> LPC [0] is just another transport method like i2c or spi that is used on
> x86 Chromebooks to access the Embedded Controller.
I'm not sure that's true. It's pretty simple I grant you, but it
still looks like a driver, rather than an abstraction layer.
I would expect to see something more like:
static int cros_ec_lpc_readmem(...)
{
return call_to_driver_to_read_memory(...);
}
... instead of all those memory/register reads/writes.
Are there any other Low Pin Count drivers in the kernel?
> So the driver is really not that different than the cros_ec_{i2c,spi}.c
> drivers.
>
> Best regards,
> Javier
>
> [0]: http://en.wikipedia.org/wiki/Low_Pin_Count
--
Lee Jones
Linaro STMicroelectronics Landing Team Lead
Linaro.org │ Open source software for ARM SoCs
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