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Message-ID: <alpine.DEB.2.11.1501241846540.5526@nanos>
Date: Sat, 24 Jan 2015 18:48:26 +0100 (CET)
From: Thomas Gleixner <tglx@...utronix.de>
To: Dmitry Eremin-Solenikov <dbaryshkov@...il.com>
cc: Russell King <linux@....linux.org.uk>,
Jason Cooper <jason@...edaemon.net>,
Linus Walleij <linus.walleij@...aro.org>,
Andrea Adami <andrea.adami@...il.com>,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 3/5] ARM: sa1100: use ioremapped memory to access SC
registers
On Thu, 15 Jan 2015, Dmitry Eremin-Solenikov wrote:
> static void sa1100_mask_irq(struct irq_data *d)
> {
> - ICMR &= ~BIT(d->hwirq);
> + u32 reg;
> + unsigned long flags;
> +
> + raw_spin_lock_irqsave(&lock, flags);
What's the exact point of that lock? And how is it related to the
$subject of the patch?
Thanks,
tglx
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