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Message-Id: <1422076748-5927-1-git-send-email-sakshi.april5@gmail.com>
Date: Sat, 24 Jan 2015 10:49:08 +0530
From: Sakshi Bansal <sakshi.april5@...il.com>
To: lidza.louina@...il.com
Cc: markh@...pro.net, gregkh@...uxfoundation.org,
driverdev-devel@...uxdriverproject.org,
linux-kernel@...r.kernel.org,
Sakshi Bansal <sakshi.april5@...il.com>
Subject: [PATCH] Staging: dgnc: dgnc_cls.h: fixed four coding style warnings
Fixed 80 line warning in the code comments.
Signed-off-by: Sakshi Bansal <sakshi.april5@...il.com>
---
drivers/staging/dgnc/dgnc_cls.h | 12 ++++++++----
1 file changed, 8 insertions(+), 4 deletions(-)
diff --git a/drivers/staging/dgnc/dgnc_cls.h b/drivers/staging/dgnc/dgnc_cls.h
index 465d79a..7444b00 100644
--- a/drivers/staging/dgnc/dgnc_cls.h
+++ b/drivers/staging/dgnc/dgnc_cls.h
@@ -38,7 +38,8 @@
struct cls_uart_struct {
u8 txrx; /* WR RHR/THR - Holding Reg */
u8 ier; /* WR IER - Interrupt Enable Reg */
- u8 isr_fcr; /* WR ISR/FCR - Interrupt Status Reg/Fifo Control Reg */
+ u8 isr_fcr; /* WR ISR/FCR - Interrupt Status Reg/Fifo
+ Control Reg */
u8 lcr; /* WR LCR - Line Control Reg */
u8 mcr; /* WR MCR - Modem Control Reg */
u8 lsr; /* WR LSR - Line Status Reg */
@@ -61,7 +62,8 @@ struct cls_uart_struct {
#define UART_16654_FCR_RXTRIGGER_56 0x80
#define UART_16654_FCR_RXTRIGGER_60 0xC0
-#define UART_IIR_CTSRTS 0x20 /* Received CTS/RTS change of state */
+#define UART_IIR_CTSRTS 0x20 /* Received CTS/RTS change of
+ state */
#define UART_IIR_RDI_TIMEOUT 0x0C /* Receiver data TIMEOUT */
/*
@@ -74,8 +76,10 @@ struct cls_uart_struct {
#define UART_EXAR654_EFR_RTSDTR 0x40 /* Auto RTS/DTR Flow Control Enable */
#define UART_EXAR654_EFR_CTSDSR 0x80 /* Auto CTS/DSR Flow COntrol Enable */
-#define UART_EXAR654_XOFF_DETECT 0x1 /* Indicates whether chip saw an incoming XOFF char */
-#define UART_EXAR654_XON_DETECT 0x2 /* Indicates whether chip saw an incoming XON char */
+#define UART_EXAR654_XOFF_DETECT 0x1 /* Indicates whether chip saw an
+ incoming XOFF char */
+#define UART_EXAR654_XON_DETECT 0x2 /* Indicates whether chip saw an
+ incoming XON char */
#define UART_EXAR654_IER_XOFF 0x20 /* Xoff Interrupt Enable */
#define UART_EXAR654_IER_RTSDTR 0x40 /* Output Interrupt Enable */
--
1.9.1
--
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