linux-kernel - Re: [PATCH v2 02/12] pm: at91: Workaround DDRSDRC self-refresh bug with LPDDR1 memories.

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Message-ID: <20150126103605.GA20837@gradator.net>
Date:	Mon, 26 Jan 2015 11:36:05 +0100
From:	Sylvain Rochet <sylvain.rochet@...secur.com>
To:	Wenyou Yang <wenyou.yang@...el.com>
Cc:	nicolas.ferre@...el.com, linux@....linux.org.uk,
	linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
	alexandre.belloni@...e-electrons.com, peda@...ntia.se
Subject: Re: [PATCH v2 02/12] pm: at91: Workaround DDRSDRC self-refresh bug
 with LPDDR1 memories.

Hello Wenyou,

On Mon, Jan 26, 2015 at 05:38:59PM +0800, Wenyou Yang wrote:
> From: Peter Rosin <peda@...ntia.se>
> 
> The DDRSDR controller fails miserably to put LPDDR1 memories in
> self-refresh. Force the controller to think it has DDR2 memories
> during the self-refresh period, as the DDR2 self-refresh spec is
> equivalent to LPDDR1, and is correctly implemented in the
> controller.
> 
> Assume that the second controller has the same fault, but that is
> untested.
> 
> Signed-off-by: Peter Rosin <peda@...ntia.se>
> Acked-by: Nicolas Ferre <nicolas.ferre@...el.com>
> ---
>  arch/arm/mach-at91/pm_slowclock.S  |   43 +++++++++++++++++++++++++++++++-----
>  include/soc/at91/at91sam9_ddrsdr.h |    2 +-
>  2 files changed, 39 insertions(+), 6 deletions(-)
> 
> diff --git a/arch/arm/mach-at91/pm_slowclock.S b/arch/arm/mach-at91/pm_slowclock.S
> index e2bfaf5..1155217 100644
> --- a/arch/arm/mach-at91/pm_slowclock.S
> +++ b/arch/arm/mach-at91/pm_slowclock.S
> @@ -100,6 +100,16 @@ ddr_sr_enable:
>  	cmp	memctrl, #AT91_MEMCTRL_DDRSDR
>  	bne	sdr_sr_enable
>  
> +	/* LPDDR1 --> force DDR2 mode during self-refresh */

I think we should explain we are dealing with an errata here, this is 
not obvious at first sight, the patch summary may find its place here :-)

Sylvain
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