lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:	Thu, 12 Feb 2015 17:24:51 +0100
From:	"Rafael J. Wysocki" <rjw@...ysocki.net>
To:	Peter Zijlstra <peterz@...radead.org>
Cc:	Thomas Gleixner <tglx@...utronix.de>,
	Alan Cox <alan@...ux.intel.com>,
	"Li, Aubrey" <aubrey.li@...ux.intel.com>,
	LKML <linux-kernel@...r.kernel.org>,
	Linux PM list <linux-pm@...r.kernel.org>,
	ACPI Devel Maling List <linux-acpi@...r.kernel.org>,
	Kristen Carlson Accardi <kristen@...ux.intel.com>,
	John Stultz <john.stultz@...aro.org>,
	Len Brown <len.brown@...el.com>
Subject: Re: [PATCH 5/6] intel_idle: Add ->enter_freeze callbacks

On Thursday, February 12, 2015 02:26:43 PM Peter Zijlstra wrote:
> On Wed, Feb 11, 2015 at 05:04:17AM +0100, Rafael J. Wysocki wrote:
> > @@ -131,28 +133,32 @@ static struct cpuidle_state nehalem_csta
> >  		.flags = MWAIT2flg(0x00),
> >  		.exit_latency = 3,
> >  		.target_residency = 6,
> > -		.enter = &intel_idle },
> > +		.enter = &intel_idle,
> > +		.enter_freeze = intel_idle_freeze, },
> >  	{
> >  		.name = "C1E-NHM",
> >  		.desc = "MWAIT 0x01",
> >  		.flags = MWAIT2flg(0x01),
> >  		.exit_latency = 10,
> >  		.target_residency = 20,
> > -		.enter = &intel_idle },
> > +		.enter = &intel_idle,
> > +		.enter_freeze = intel_idle_freeze, },
> >  	{
> >  		.name = "C3-NHM",
> >  		.desc = "MWAIT 0x10",
> >  		.flags = MWAIT2flg(0x10) | CPUIDLE_FLAG_TLB_FLUSHED,
> >  		.exit_latency = 20,
> >  		.target_residency = 80,
> > -		.enter = &intel_idle },
> > +		.enter = &intel_idle,
> > +		.enter_freeze = intel_idle_freeze, },
> >  	{
> >  		.name = "C6-NHM",
> >  		.desc = "MWAIT 0x20",
> >  		.flags = MWAIT2flg(0x20) | CPUIDLE_FLAG_TLB_FLUSHED,
> >  		.exit_latency = 200,
> >  		.target_residency = 800,
> > -		.enter = &intel_idle },
> > +		.enter = &intel_idle,
> > +		.enter_freeze = intel_idle_freeze, },
> >  	{
> >  		.enter = NULL }
> >  };
> 
> Why bother with enter_freeze() for any but the deepest state (C6 in this
> case)?

User space may disable the deepest one (and any of them in general) via sysfs
and there's no good reason to ignore its choice in this particular case while
we're honoring it otherwise.

So the logic is basically "find the deepest one which isn't disabled" and
setting the pointers costs us nothing really.

> Also, should we ignore things like intel_idle.max_cstate for this
> selection?

No, we shouldn't.  The deeper ones may just not work then.

--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ