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Message-Id: <1424436249-3572-3-git-send-email-adrian.hunter@intel.com>
Date: Fri, 20 Feb 2015 14:44:09 +0200
From: Adrian Hunter <adrian.hunter@...el.com>
To: Peter Zijlstra <peterz@...radead.org>,
Ingo Molnar <mingo@...hat.com>
Cc: Arnaldo Carvalho de Melo <acme@...nel.org>,
linux-kernel@...r.kernel.org, David Ahern <dsahern@...il.com>,
Frederic Weisbecker <fweisbec@...il.com>,
Jiri Olsa <jolsa@...hat.com>,
Namhyung Kim <namhyung@...il.com>,
Paul Mackerras <paulus@...ba.org>,
Stephane Eranian <eranian@...gle.com>,
John Stultz <john.stultz@...aro.org>,
Thomas Gleixner <tglx@...utronix.de>,
Pawel Moll <pawel.moll@....com>,
Steven Rostedt <rostedt@...dmis.org>,
Andi Kleen <ak@...ux.intel.com>,
Mathieu Poirier <mathieu.poirier@...aro.org>
Subject: [PATCH V2 2/2] perf/x86: Provide TSC for PERF_SAMPLE_CLOCK_PT
Provide TSC for PERF_SAMPLE_CLOCK_PT. This is needed
to match perf events against hardware traces like
Intel Processor Trace (Intel PT) which is the
purpose for which PERF_SAMPLE_CLOCK_PT was invented.
Signed-off-by: Adrian Hunter <adrian.hunter@...el.com>
---
arch/x86/include/asm/perf_event.h | 6 ++++++
arch/x86/kernel/cpu/perf_event.c | 10 ++++++++++
2 files changed, 16 insertions(+)
diff --git a/arch/x86/include/asm/perf_event.h b/arch/x86/include/asm/perf_event.h
index dc0f6ed..a022f53 100644
--- a/arch/x86/include/asm/perf_event.h
+++ b/arch/x86/include/asm/perf_event.h
@@ -261,6 +261,12 @@ struct perf_guest_switch_msr {
extern struct perf_guest_switch_msr *perf_guest_get_msrs(int *nr);
extern void perf_get_x86_pmu_capability(struct x86_pmu_capability *cap);
extern void perf_check_microcode(void);
+
+#ifdef CONFIG_X86_TSC
+#define HAVE_PERF_SAMPLE_CLOCK_PT 1
+u64 perf_sample_clock_pt(void);
+#endif
+
#else
static inline struct perf_guest_switch_msr *perf_guest_get_msrs(int *nr)
{
diff --git a/arch/x86/kernel/cpu/perf_event.c b/arch/x86/kernel/cpu/perf_event.c
index 8271d6b..dc10084 100644
--- a/arch/x86/kernel/cpu/perf_event.c
+++ b/arch/x86/kernel/cpu/perf_event.c
@@ -2256,3 +2256,13 @@ void perf_get_x86_pmu_capability(struct x86_pmu_capability *cap)
cap->events_mask_len = x86_pmu.events_mask_len;
}
EXPORT_SYMBOL_GPL(perf_get_x86_pmu_capability);
+
+#ifdef CONFIG_X86_TSC
+u64 perf_sample_clock_pt(void)
+{
+ u64 tsc;
+
+ rdtscll(tsc);
+ return tsc;
+}
+#endif
--
1.9.1
--
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