linux-kernel - Re: [tip:perf/x86] perf/x86/intel: Support task events with Intel CQM

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Date:	Tue, 3 Mar 2015 23:16:57 -0500 (EST)
From:	Vince Weaver <vince@...ter.net>
To:	mingo@...nel.org, vikas.shivappa@...ux.intel.com, hpa@...or.com,
	acme@...nel.org, linux-kernel@...r.kernel.org, tglx@...utronix.de,
	acme@...hat.com, torvalds@...ux-foundation.org,
	matt.fleming@...el.com, kanaka.d.juvva@...el.com, jolsa@...hat.com,
	peterz@...radead.org
Subject: Re: [tip:perf/x86] perf/x86/intel: Support task events with Intel
 CQM

On Wed, 25 Feb 2015, tip-bot for Matt Fleming wrote:

> diff --git a/include/uapi/linux/perf_event.h b/include/uapi/linux/perf_event.h
> index 1e3cd07..3c8b45d 100644
> --- a/include/uapi/linux/perf_event.h
> +++ b/include/uapi/linux/perf_event.h
> @@ -32,6 +32,7 @@ enum perf_type_id {
>  	PERF_TYPE_HW_CACHE			= 3,
>  	PERF_TYPE_RAW				= 4,
>  	PERF_TYPE_BREAKPOINT			= 5,
> +	PERF_TYPE_INTEL_CQM			= 6,
>  
>  	PERF_TYPE_MAX,				/* non-ABI */
>  };

I thought the rule was no adding support for things in perf_event unless 
they were sufficiently generic as to be cross-architecture.

Having a high-level event type with "intel" in the name seems awfully 
specific.

Vince
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/