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Message-ID: <20150305005516.GB21715@gmail.com>
Date: Thu, 5 Mar 2015 01:55:16 +0100
From: Ingo Molnar <mingo@...nel.org>
To: Vince Weaver <vince@...ter.net>,
Peter Zijlstra <a.p.zijlstra@...llo.nl>
Cc: vikas.shivappa@...ux.intel.com, hpa@...or.com, acme@...nel.org,
linux-kernel@...r.kernel.org, tglx@...utronix.de, acme@...hat.com,
torvalds@...ux-foundation.org, matt.fleming@...el.com,
kanaka.d.juvva@...el.com, jolsa@...hat.com, peterz@...radead.org
Subject: Re: [tip:perf/x86] perf/x86/intel: Support task events with Intel CQM
* Vince Weaver <vince@...ter.net> wrote:
> On Wed, 25 Feb 2015, tip-bot for Matt Fleming wrote:
>
> > diff --git a/include/uapi/linux/perf_event.h b/include/uapi/linux/perf_event.h
> > index 1e3cd07..3c8b45d 100644
> > --- a/include/uapi/linux/perf_event.h
> > +++ b/include/uapi/linux/perf_event.h
> > @@ -32,6 +32,7 @@ enum perf_type_id {
> > PERF_TYPE_HW_CACHE = 3,
> > PERF_TYPE_RAW = 4,
> > PERF_TYPE_BREAKPOINT = 5,
> > + PERF_TYPE_INTEL_CQM = 6,
> >
> > PERF_TYPE_MAX, /* non-ABI */
> > };
>
> I thought the rule was no adding support for things in perf_event unless
> they were sufficiently generic as to be cross-architecture.
>
> Having a high-level event type with "intel" in the name seems awfully
> specific.
That's a fair point. Peter?
Thanks,
Ingo
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