linux-kernel - Re: [PATCH v2] ARM64: Add new Xilinx ZynqMP SoC

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Message-ID: <20150305150322.19e378d9@free-electrons.com>
Date:	Thu, 5 Mar 2015 15:03:22 +0100
From:	Thomas Petazzoni <thomas.petazzoni@...e-electrons.com>
To:	Michal Simek <michal.simek@...inx.com>
Cc:	linux-arm-kernel@...ts.infradead.org,
	Mark Rutland <mark.rutland@....com>,
	Rob Herring <robherring2@...il.com>,
	devicetree@...r.kernel.org, Zach Pfeffer <zachp@...inx.com>,
	Pawel Moll <pawel.moll@....com>,
	Ian Campbell <ijc+devicetree@...lion.org.uk>,
	Catalin Marinas <catalin.marinas@....com>,
	Mark Brown <broonie@...aro.org>,
	Will Deacon <will.deacon@....com>,
	linux-kernel@...r.kernel.org, Robert Richter <rrichter@...ium.com>,
	Rob Herring <robh+dt@...nel.org>,
	Kumar Gala <galak@...eaurora.org>,
	Eddie Huang <eddie.huang@...iatek.com>,
	Sören Brinkmann <soren.brinkmann@...inx.com>
Subject: Re: [PATCH v2] ARM64: Add new Xilinx ZynqMP SoC

Dear Michal Simek,

On Thu,  5 Mar 2015 14:53:34 +0100, Michal Simek wrote:

> +	pmu {
> +		compatible = "arm,armv8-pmuv3";
> +		interrupts = <0 143 4>,
> +			     <0 144 4>,
> +			     <0 145 4>,
> +			     <0 146 4>;

Any reason not to use

#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/interrupt-controller/irq.h>

in order to write the more descriptive:

		interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>,
			     <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>,
			     <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>,
			     <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;

And ditto for all other interrupts properties?

Thanks,

Thomas
-- 
Thomas Petazzoni, CTO, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
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