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Message-ID: <54F862BE.7000901@arm.com>
Date: Thu, 05 Mar 2015 14:05:50 +0000
From: Marc Zyngier <marc.zyngier@....com>
To: Michal Simek <michal.simek@...inx.com>,
linux-arm-kernel@...ts.infradead.org,
Mark Rutland <mark.rutland@....com>,
Rob Herring <robherring2@...il.com>
CC: devicetree@...r.kernel.org, Zach Pfeffer <zachp@...inx.com>,
Pawel Moll <pawel.moll@....com>,
Ian Campbell <ijc+devicetree@...lion.org.uk>,
Catalin Marinas <catalin.marinas@....com>,
Mark Brown <broonie@...aro.org>,
Will Deacon <will.deacon@....com>,
linux-kernel@...r.kernel.org, Robert Richter <rrichter@...ium.com>,
Rob Herring <robh+dt@...nel.org>,
Kumar Gala <galak@...eaurora.org>,
Eddie Huang <eddie.huang@...iatek.com>,
Sören Brinkmann <soren.brinkmann@...inx.com>
Subject: Re: [PATCH v2] ARM64: Add new Xilinx ZynqMP SoC
Hi Michal,
On 05/03/15 13:53, Michal Simek wrote:
> Initial version of device tree for Xilinx ZynqMP SoC.
>
> Signed-off-by: Michal Simek <michal.simek@...inx.com>
> Acked-by: Sören Brinkmann <soren.brinkmann@...inx.com>
> ---
>
> Changes in v2:
> - move timer out of amba_apu bus because it is not on bus
> Reported by Mark
> - FIC GICC and GICV addresses - Reported by Rob
> - Fix copyright
> - Enable cadence IP in defconfig
> - Add support for macb multiqueue
>
> arch/arm64/Kconfig | 5 +
> arch/arm64/boot/dts/Makefile | 1 +
> arch/arm64/boot/dts/xilinx/Makefile | 5 +
> arch/arm64/boot/dts/xilinx/zynqmp-ep108.dts | 47 +++++
> arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 303 ++++++++++++++++++++++++++++
> arch/arm64/configs/defconfig | 3 +
> 6 files changed, 364 insertions(+)
> create mode 100644 arch/arm64/boot/dts/xilinx/Makefile
> create mode 100644 arch/arm64/boot/dts/xilinx/zynqmp-ep108.dts
> create mode 100644 arch/arm64/boot/dts/xilinx/zynqmp.dtsi
[...]
> diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-ep108.dts b/arch/arm64/boot/dts/xilinx/zynqmp-ep108.dts
> new file mode 100644
> index 000000000000..0a3f40ecd06d
> --- /dev/null
> +++ b/arch/arm64/boot/dts/xilinx/zynqmp-ep108.dts
[...]
> + gic: interrupt-controller@...10000 {
> + compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
> + #interrupt-cells = <3>;
> + reg = <0x0 0xf9010000 0x10000>,
> + <0x0 0xf902f000 0x2000>,
> + <0x0 0xf9040000 0x20000>,
> + <0x0 0xf906f000 0x2000>;
> + interrupt-controller;
Please add the missing GIC maintenance interrupt.
Thanks,
M.
--
Jazz is not dead. It just smells funny...
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