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Message-ID: <CAGTfZH3Bf1ueFO25NXFbN+Mvb9TcGbErbSp=a+vQ0=A+E07mQA@mail.gmail.com>
Date: Fri, 6 Mar 2015 01:12:43 +0900
From: Chanwoo Choi <cwchoi00@...il.com>
To: Mark Rutland <mark.rutland@....com>
Cc: Chanwoo Choi <cw00.choi@...sung.com>,
"kgene@...nel.org" <kgene@...nel.org>,
Marc Zyngier <Marc.Zyngier@....com>,
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Catalin Marinas <Catalin.Marinas@....com>,
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Subject: Re: [PATCH v5 1/9] arm64: dts: exynos: Add dts files for 64-bit
Exynos5433 SoC
Hi Mark,
On Thu, Mar 5, 2015 at 9:24 PM, Mark Rutland <mark.rutland@....com> wrote:
> On Thu, Mar 05, 2015 at 05:38:23AM +0000, Chanwoo Choi wrote:
>> This patch adds new Exynos5433 dtsi to support 64-bit Exynos5433 SoC based on
>> Octal core CPUs (quad Cortex-A57 and quad Cortex-A53). And Exynos5433 supports
>> PSCI (Power State Coordination Interface) v0.1.
>>
>> This patch includes following dt node to support Exynos5433 SoC:
>> 1. Octa core for big.LITTLE architecture
>> - Cortex-A53 LITTLE Quad-core
>> - Cortex-A57 big Quad-core
>> - Support PSCI v0.1
>
> [...]
>
>> + psci {
>> + compatible = "arm,psci";
>> + method = "smc";
>> + cpu_off = <0x84000002>;
>> + cpu_on = <0xC4000003>;
>> + };
>
> Back at v2 you mentioned that CPU_OFF wasn't working [1].
>
> Do both CPU_ON and CPU_OFF work for all CPUs, including the boot CPU?
The CPU1 ~ CPU7 are well woking about CPU_ON/OFF.
CPU0 (boot CPU) is only well working for CPU_OFF.
But when I try to turn on the CPU0 after CPU_OFF, I failed it.
>
> I take it CPUs boot at EL2?
>
> [...]
>
>> + timer {
>> + compatible = "arm,armv8-timer";
>> + interrupts = <1 13 0xff04>,
>> + <1 14 0xff04>,
>> + <1 11 0xff04>,
>> + <1 10 0xff04>;
>> + };
>
> The timer node should be moved under the root node. It doesn't live on
> the bus; it's a component of the CPU.
OK. I'll move it according to your comment.
Thanks,
Chanwoo Choi
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