linux-kernel - Re: [RFC PATCH] sys_membarrier(): system/process-wide memory barrier (x86) (v12)

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <20150317163756.GE23123@twins.programming.kicks-ass.net>
Date:	Tue, 17 Mar 2015 17:37:56 +0100
From:	Peter Zijlstra <peterz@...radead.org>
To:	Mathieu Desnoyers <mathieu.desnoyers@...icios.com>
Cc:	linux-kernel@...r.kernel.org,
	KOSAKI Motohiro <kosaki.motohiro@...fujitsu.com>,
	Steven Rostedt <rostedt@...dmis.org>,
	"Paul E. McKenney" <paulmck@...ux.vnet.ibm.com>,
	Nicholas Miell <nmiell@...cast.net>,
	Linus Torvalds <torvalds@...ux-foundation.org>,
	Ingo Molnar <mingo@...hat.com>,
	Alan Cox <gnomes@...rguk.ukuu.org.uk>,
	Lai Jiangshan <laijs@...fujitsu.com>,
	Stephen Hemminger <stephen@...workplumber.org>,
	Andrew Morton <akpm@...ux-foundation.org>,
	Josh Triplett <josh@...htriplett.org>,
	Thomas Gleixner <tglx@...utronix.de>,
	David Howells <dhowells@...hat.com>
Subject: Re: [RFC PATCH] sys_membarrier(): system/process-wide memory barrier
 (x86) (v12)

On Tue, Mar 17, 2015 at 01:13:36PM +0000, Mathieu Desnoyers wrote:
> > Its basically: WMB + ACQUIRE, which theoretically can leak a read in,
> > but nobody sane _delays_ reads, you want to speculate reads, not
> > postpone.
> 
> If I believe the memory ordering table at
> https://en.wikipedia.org/wiki/Memory_ordering , there appears
> to be quite a few architectures that can reorder loads after loads,
> and loads after stores: Alpha, ARMv7, PA-RISC, SPARC RMO, x86 oostore
> and ia64. There may be subtle details that would allow us to
> do without the barriers in specific situations, but for that I'd
> very much like to hear what Paul has to say.

So I was starting to write that you can get load after load by one
speculating more than the other, but I suppose you can delay loads just
fine too.

Imagine getting a cache miss on a load, the OoO engine can then continue
execution until it hits a hard dependency, so you're effectively
delaying the load.

So yeah, if we want to be able to replace smp_rmb() with a
barrier+sys_membar() we need to promote the smp_mb__before_spinlock() to
smp_mb__after_unlock_lock() or so, that would only penalize PPC a bit.
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/