| lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
|
Open Source and information security mailing list archives
| ||
|
Message-ID: <20150320052807.GA11451@codeaurora.org> Date: Thu, 19 Mar 2015 22:28:07 -0700 From: Stephen Boyd <sboyd@...eaurora.org> To: Archit Taneja <architt@...eaurora.org> Cc: mturquette@...aro.org, linux-arm-msm@...r.kernel.org, linux-kernel@...r.kernel.org Subject: Re: [PATCH] clk: qcom: fix RCG M/N counter configuration On 03/04, Archit Taneja wrote: > Currently, a RCG's M/N counter (used for fraction division) is set to either > 'bypass' (counter disabled) or 'dual edge' (counter enabled) based on whether > the corresponding rcg struct has a mnd field specified and a non-zero N. > > In the case where M and N are the same value, the M/N counter is still enabled > by code even though no division takes place. Leaving the RCG in such a state > can result in improper behavior. This was observed with the DSI pixel clock RCG > when M and N were both set to 1. > > Add an additional check (M != N) to enable the M/N counter only when it's needed > for fraction division. > > Signed-off-by: Archit Taneja <architt@...eaurora.org> > --- I'm going to queue this up for 4.1 given that this isn't a new regression. But I'll tag it for stable so that we get it into all the stable trees. -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@...r.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Powered by blists - more mailing lists