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Message-ID: <20150330172545.GG2366@two.firstfloor.org>
Date:	Mon, 30 Mar 2015 19:25:45 +0200
From:	Andi Kleen <andi@...stfloor.org>
To:	"Liang, Kan" <kan.liang@...el.com>
Cc:	Peter Zijlstra <peterz@...radead.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	"mingo@...nel.org" <mingo@...nel.org>,
	"acme@...radead.org" <acme@...radead.org>,
	"eranian@...gle.com" <eranian@...gle.com>,
	"andi@...stfloor.org" <andi@...stfloor.org>
Subject: Re: [PATCH V5 4/6] perf, x86: handle multiple records in PEBS buffer

> >  - its possible (and harmless) for the status field to contain set bits
> >    for !PEBS events -- the proposed code is buggy here.
> I will fix it.
> >  - its possible to have multiple PEBS bits set even though the event
> >    really only was for a single event -- if you count everything with
> >    multiple PEBS bits set as a collision you're counting wrong.
> > 
> 
> In what situation multiple PEBS bits was set for a single event?
> Could you please give me an example?

The field in the PEBS record is just a copy of GLOBAL_STATUS (minus
some extra bits), so if there were already bits in GLOBAL_STATUS 
that haven't been cleared yet you may see multiple bits

In a proper configuration this should be rare, as we expect the
events to be different and run on different effective frequencies,
so GLOBAL_STATUS should be already cleared.

-Andi

-- 
ak@...ux.intel.com -- Speaking for myself only.
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