linux-kernel - [PATCH v3 2/3] devicetree: spi: fsl-dspi: Add cs-sck delays

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Message-Id: <1428093571-20407-3-git-send-email-aaron.brice@datasoft.com>
Date:	Fri,  3 Apr 2015 13:39:30 -0700
From:	Aaron Brice <aaron.brice@...asoft.com>
To:	broonie@...nel.org
Cc:	linux-spi@...r.kernel.org, linux-kernel@...r.kernel.org,
	stefan@...er.ch, devicetree@...r.kernel.org
Subject: [PATCH v3 2/3] devicetree: spi: fsl-dspi: Add cs-sck delays

Adding fsl,spi-cs-sck-delay and fsl,spi-sck-cs-delay properties to
support delays before and after starting the clock in a transfer.

Signed-off-by: Aaron Brice <aaron.brice@...asoft.com>
---
 Documentation/devicetree/bindings/spi/spi-fsl-dspi.txt | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/Documentation/devicetree/bindings/spi/spi-fsl-dspi.txt b/Documentation/devicetree/bindings/spi/spi-fsl-dspi.txt
index cbbe16e..70af78a 100644
--- a/Documentation/devicetree/bindings/spi/spi-fsl-dspi.txt
+++ b/Documentation/devicetree/bindings/spi/spi-fsl-dspi.txt
@@ -16,6 +16,12 @@ Optional property:
   in big endian mode, otherwise in native mode(same with CPU), for more
   detail please see: Documentation/devicetree/bindings/regmap/regmap.txt.
 
+Optional SPI slave node properties:
+- fsl,spi-cs-sck-delay: a delay in nanoseconds between activating chip
+  select and the start of clock signal, at the start of a transfer.
+- fsl,spi-sck-cs-delay: a delay in nanoseconds between stopping the clock
+  signal and deactivating chip select, at the end of a transfer.
+
 Example:
 
 dspi0@...2c000 {
@@ -43,6 +49,8 @@ dspi0@...2c000 {
 		reg = <0>;
 		linux,modalias = "m25p80";
 		modal = "at26df081a";
+		fsl,spi-cs-sck-delay = <100>;
+		fsl,spi-sck-cs-delay = <50>;
 	};
 };
 
-- 
2.1.0

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