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Message-ID: <CACRpkdbhwOd9P56Hwn5XaOMrSTp--XW-i9aDXwmYR+GbzAWurQ@mail.gmail.com>
Date: Tue, 7 Apr 2015 15:18:20 +0200
From: Linus Walleij <linus.walleij@...aro.org>
To: Mika Westerberg <mika.westerberg@...ux.intel.com>
Cc: Heikki Krogerus <heikki.krogerus@...ux.intel.com>,
Mathias Nyman <mathias.nyman@...ux.intel.com>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"linux-gpio@...r.kernel.org" <linux-gpio@...r.kernel.org>
Subject: Re: [PATCH] pinctrl: intel: Add Intel Sunrisepoint pin controller and
GPIO support
On Mon, Mar 30, 2015 at 4:31 PM, Mika Westerberg
<mika.westerberg@...ux.intel.com> wrote:
> This driver supports pinctrl/GPIO hardware found on Intel Sunrisepoint (a
> Skylake PCH) providing users a pinctrl and GPIO interfaces (including GPIO
> interrupts).
>
> The driver is split into core and platform parts so that the same core
> driver can be reused in other drivers for other Intel GPIO hardware that is
> based on the same host controller design.
>
> Signed-off-by: Mathias Nyman <mathias.nyman@...ux.intel.com>
> Signed-off-by: Mika Westerberg <mika.westerberg@...ux.intel.com>
How could I possibly resist this gorgeous driver that just
does everything right? Patch applied for 4.1.
> +config PINCTRL_INTEL
> + tristate
> + select PINMUX
> + select PINCONF
> + select GENERIC_PINCONF
> + select GPIOLIB
> + select GPIOLIB_IRQCHIP
Is this opening a refactoring possibility sharing more code/infrastructure
amongst the Intel drivers or just something that will be used for
new SoCs going forward?
Yours,
Linus Walleij
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