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Message-ID: <20150410204125.GS15335@tassilo.jf.intel.com>
Date: Fri, 10 Apr 2015 13:41:25 -0700
From: Andi Kleen <ak@...ux.intel.com>
To: Andy Lutomirski <luto@...capital.net>
Cc: Andi Kleen <andi@...stfloor.org>, X86 ML <x86@...nel.org>,
Andrew Lutomirski <luto@...nel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
Steven Rostedt <rostedt@...dmis.org>,
Borislav Petkov <bp@...en8.de>
Subject: Re: [PATCH 4/8] x86: Add support for rd/wr fs/gs base
> It wouldn't take any additional memory at all. Currently we have 8k
> of "debug" stack which is really two 4k pieces, and you're putting the
> kernel gs base in the bottom word. I'm suggesting that you duplicate
> the kernel gs base at the bottom work and the bottom word + 4k. We
> already have a hard limit of 4k of debug stack because of the IST
> shift mechanism -- it really is two separate 4k stacks, not one 8k
> stack.
Seems like a hack. What happens if we add an uneven number of stacks?
Just handling it in the code is simple enough.
-Andi
--
ak@...ux.intel.com -- Speaking for myself only
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