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Message-ID: <20150424095906.GL13605@tassilo.jf.intel.com>
Date: Fri, 24 Apr 2015 02:59:06 -0700
From: Andi Kleen <ak@...ux.intel.com>
To: Thomas Gleixner <tglx@...utronix.de>
Cc: Alexander Shishkin <alexander.shishkin@...ux.intel.com>,
Ingo Molnar <mingo@...hat.com>,
"H. Peter Anvin" <hpa@...or.com>, x86@...nel.org,
Don Zickus <dzickus@...hat.com>,
Frederic Weisbecker <fweisbec@...il.com>,
Adrian Hunter <adrian.hunter@...el.com>,
Anton Blanchard <anton@...ba.org>,
Michael Ellerman <mpe@...erman.id.au>,
linux-kernel@...r.kernel.org, stable@...r.kernel.org
Subject: Re: [PATCH v1] watchdog: Use a reference cycle counter to avoid
scaling issues
> There are better ways to do that than using heuristics. We have to
> deal with 3 variants of the reference counter:
>
> 1) Core and Atom: counts bus cycles and we know that frequency already
> from the local apic calibration
>
> 2) Nehalem, Westmere: Same as TSC
>
> 3) Sandybridge and later: XCLK which is 100MHz
>
> No magic calibration, just use the information which we have on our
> hands already.
This is a really bad idea. We basically would need to maintain a big
switch with model numbers, with new cases added for every new CPU.
Would be a maintenance nightmare.
-Andi
--
ak@...ux.intel.com -- Speaking for myself only
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