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Message-ID: <20150501102508.GL10239@pd.tnic>
Date:	Fri, 1 May 2015 12:25:08 +0200
From:	Borislav Petkov <bp@...en8.de>
To:	Aravind Gopalakrishnan <Aravind.Gopalakrishnan@....com>
Cc:	tglx@...utronix.de, mingo@...hat.com, hpa@...or.com,
	tony.luck@...el.com, jiang.liu@...ux.intel.com, yinghai@...nel.org,
	x86@...nel.org, dvlasenk@...hat.com, JBeulich@...e.com,
	slaoub@...il.com, luto@...capital.net, dave.hansen@...ux.intel.com,
	oleg@...hat.com, rostedt@...dmis.org, rusty@...tcorp.com.au,
	prarit@...hat.com, linux@...musvillemoes.dk, jroedel@...e.de,
	andriy.shevchenko@...ux.intel.com, macro@...ux-mips.org,
	wangnan0@...wei.com, linux-kernel@...r.kernel.org,
	linux-edac@...r.kernel.org
Subject: Re: [PATCH 1/4] x86/mce: Define 'SUCCOR' cpuid bit

On Thu, Apr 30, 2015 at 09:49:22AM -0500, Aravind Gopalakrishnan wrote:
> SUCCOR stands for S/W UnCorrectable error COntainment and Recovery.
> It indicates support for data poisoning in HW and deferred error
> interrupts.
> 
> Add new bitfield in mce_vendor_flags for this.
> We use this to verify prescence of deferred error interrupts
> before we enable them in mce_amd.c
> 
> Signed-off-by: Aravind Gopalakrishnan <Aravind.Gopalakrishnan@....com>
> ---
>  arch/x86/include/asm/mce.h       | 3 ++-
>  arch/x86/kernel/cpu/mcheck/mce.c | 1 +
>  2 files changed, 3 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/x86/include/asm/mce.h b/arch/x86/include/asm/mce.h
> index 1f5a86d..dfcb664 100644
> --- a/arch/x86/include/asm/mce.h
> +++ b/arch/x86/include/asm/mce.h
> @@ -118,7 +118,8 @@ struct mca_config {
>  
>  struct mce_vendor_flags {
>  	__u64		overflow_recov	: 1, /* cpuid_ebx(80000007) */
> -			__reserved_0	: 63;
> +			succor		: 1,

Please add that CPUID bit definition from the commit message here too so
that we know what it means.

> +			__reserved_0	: 62;
>  };
>  extern struct mce_vendor_flags mce_flags;
>  
> diff --git a/arch/x86/kernel/cpu/mcheck/mce.c b/arch/x86/kernel/cpu/mcheck/mce.c
> index e535533..de61f62e 100644
> --- a/arch/x86/kernel/cpu/mcheck/mce.c
> +++ b/arch/x86/kernel/cpu/mcheck/mce.c
> @@ -1640,6 +1640,7 @@ static void __mcheck_cpu_init_vendor(struct cpuinfo_x86 *c)
>  	case X86_VENDOR_AMD:
>  		mce_amd_feature_init(c);
>  		mce_flags.overflow_recov = cpuid_ebx(0x80000007) & 0x1;
> +		mce_flags.succor = (cpuid_ebx(0x80000007) & 0x2) ? 1 : 0;

		mce_flags.succor = !!(cpuid_ebx(0x80000007) & BIT(1));

is a common way of assigning truth values from bits in the kernel.

You can change the above one to use BIT(0) too, while at it, and
vertically align the assignments.

Thanks.

-- 
Regards/Gruss,
    Boris.

ECO tip #101: Trim your mails when you reply.
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