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Message-ID: <20150506095858.GA16458@gmail.com>
Date: Wed, 6 May 2015 11:58:58 +0200
From: Ingo Molnar <mingo2.kernel.org@...il.com>
To: Bryan O'Donoghue <pure.logic@...us-software.ie>
Cc: tglx@...utronix.de, mingo@...hat.com, hpa@...or.com,
x86@...nel.org, dvhart@...radead.org, andy.schevchenko@...il.com,
boon.leong.ong@...el.com, linux-kernel@...r.kernel.org,
platform-driver-x86@...r.kernel.org, derek.browne@...el.com,
josef.ahmad@...el.com, erik.nyquist@...el.com
Subject: Re: [PATCH 1/2] x86/quark: Add Quark embedded SRAM support
* Bryan O'Donoghue <pure.logic@...us-software.ie> wrote:
> +/**
> + * esram_page_overlay - Overlay a page with fast access eSRAM.
> + *
> + * This function takes a 4 KiB aligned physical address and programs an
> + * eSRAM page to overlay that 4 KiB region. We require and verify that the
> + * target memory is read-write - since we don't support overlay of read-only
> + * memory regions - such as kernel .text areas. Overlay of .text areas is
> + * not supported because eSRAM isn't self-populating and we cannot guarantee
> + * atomicity of the overlay operation. It is assumed and required that the
> + * caller of the overlay function is overlaying a data buffer not kernel
> + * code.
So if this SRAM truly has L1 speeds then overlaying kernel text would
sure be a lovely usecase!
Which part of the overlay operation is inatomic? Could we solve it by
double buffering: first creating a temporary buffer, mapping the eSRAM
pages there and copying kernel text to it?
Now that we've populated it, we only have to remap the eSRAM to the
real kernel text pages.
Its inatomicity should not matter: whether the CPU fetches from DRAM
or from eSRAM, it should be the same content.
Once the remapping is done, the double buffer can be freed.
Likewise, the text of kernel modules could be eSRAM cached as well,
although core kernel text is probably even more beneficial.
Thanks,
Ingo
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