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Date:	Fri, 8 May 2015 08:27:35 +0100
From:	Lee Jones <lee.jones@...aro.org>
To:	Geert Uytterhoeven <geert@...ux-m68k.org>
Cc:	York Sun <yorksun@...escale.com>,
	Julia Lawall <Julia.Lawall@...6.fr>,
	Linux I2C <linux-i2c@...r.kernel.org>, wolfram@...-dreams.de,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: Why isn't IRQ shared for i2c-ocore

On Fri, 08 May 2015, Geert Uytterhoeven wrote:

> On Fri, May 8, 2015 at 8:57 AM, Lee Jones <lee.jones@...aro.org> wrote:
> > On Fri, 08 May 2015, Geert Uytterhoeven wrote:
> >
> >> On Thu, May 7, 2015 at 9:01 AM, Lee Jones <lee.jones@...aro.org> wrote:
> >> >> I have a follow up question regarding interrupt. I see many I2C bus drivers
> >> >> request interrupt with flag = 0. Why not using IRQF_SHARED?
> >> >
> >> > Probably because that particular IRQ is only used by the I2C
> >> > Controller.  I'm not exactly sure that you're getting at?  Why do you
> >> > think it should be shared?  You should only flag it as shared if it
> >> > is.
> >>
> >> However, that's something the driver can't know.
> >> Sharing interrupts is an integration property. The same IP core may share its
> >> interrupt on one SoC, and not on another.
> >
> > I guess that would depend on the IP.  If this is part of an MFD, you'd
> > know if you only hand a single interrupt line coming into the chip or
> > not.  If the IP can be moved around (copy & pasted) into different
> > chips, then yes, that might change.
> >
> > How does one share an interrupt with other drivers if all them don't
> > know the IRQ is shared thought?
> 
> All drivers sharing the same interrupt must pass IRQF_SHARED, cfr. the
> checks in __setup_irq().
> 
> Traditionally, PC (ISA) drivers didn't share interrupts, as the ISA bus
> prohibited interrupt sharing.
> Amiga drivers did.
> 
> New drivers should support IRQ sharing.

Precisely, which is why I'm confused by:

  "However, that's something the driver can't know."

-- 
Lee Jones
Linaro STMicroelectronics Landing Team Lead
Linaro.org │ Open source software for ARM SoCs
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