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Date:	Mon, 11 May 2015 18:36:05 +0200
From:	Peter Zijlstra <peterz@...radead.org>
To:	Stephane Eranian <eranian@...gle.com>
Cc:	Andi Kleen <andi@...stfloor.org>,
	LKML <linux-kernel@...r.kernel.org>,
	Andi Kleen <ak@...ux.intel.com>
Subject: Re: [PATCH 9/9] x86, perf: Move PMU ACK after LBR read

On Mon, May 11, 2015 at 09:32:33AM -0700, Stephane Eranian wrote:
> >> This is a minimal change. In principle the ACK could be moved much later.
> >
> > Right, so the more complete change would be to use the new and improved
> > FREEZE_ON_PMI and reenable both the LBRs and the CTRs with the
> > STATUS_RESET MSR, right?
> >
> > Does it make sense to have a new handle_irq() routine for that?
> 
> Were we not already using FREEZE_ON_PMI with LBR (except for one
> erratum on HSW)?

That's FREEZE_LBRS_ON_PMI, I was referring to FREEZE_PERFMON_ON_PMI,
which we've not used so far.

I think Andi tried using it before, but there's some issues with it on
v3, but v4 should have fixed all that.

Andi can you perhaps explain what the problem with FREEZE_PERFMON_ON_PMI
on v3 was again?

> It would make sense to me to have an "optimized" and clean handle_irq
> for the newer PMU.
> We the caveat that any change to the core of it would now have to be done twice.

We could pull that out in a shared function of course, if possible.
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