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Message-ID: <1431451444-23155-17-git-send-email-rklein@nvidia.com>
Date: Tue, 12 May 2015 13:23:58 -0400
From: Rhyland Klein <rklein@...dia.com>
To: Peter De Schrijver <pdeschrijver@...dia.com>
CC: Mike Turquette <mturquette@...aro.org>,
Stephen Warren <swarren@...dotorg.org>,
Stephen Boyd <sboyd@...eaurora.org>,
Thierry Reding <thierry.reding@...il.com>,
Alexandre Courbot <gnurou@...il.com>,
Bill Huang <bilhuang@...dia.com>,
Paul Walmsley <pwalmsley@...dia.com>,
Jim Lin <jilin@...dia.com>, Benson Leung <bleung@...omium.org>,
linux-clk@...r.kernel.org, linux-tegra@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: [PATCH v5 15/21] clk: tegra: pll: Add dyn_ramp callback
From: Bill Huang <bilhuang@...dia.com>
Add a callback to the pll_params for custom dynamic ramping
functions which can be specified per PLL.
Signed-off-by: Bill Huang <bilhuang@...dia.com>
---
drivers/clk/tegra/clk.h | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/drivers/clk/tegra/clk.h b/drivers/clk/tegra/clk.h
index 330729a822cf..a61d388364b3 100644
--- a/drivers/clk/tegra/clk.h
+++ b/drivers/clk/tegra/clk.h
@@ -160,6 +160,8 @@ struct div_nmp {
#define MAX_PLL_MISC_REG_COUNT 6
+struct tegra_clk_pll;
+
/**
* struct tegra_clk_pll_params - PLL parameters
*
@@ -271,6 +273,8 @@ struct tegra_clk_pll_params {
unsigned long rate, unsigned long parent_rate);
unsigned long (*adjust_vco)(struct tegra_clk_pll_params *pll_params,
unsigned long parent_rate);
+ int (*dyn_ramp)(struct tegra_clk_pll *pll,
+ struct tegra_clk_pll_freq_table *cfg);
};
#define TEGRA_PLL_USE_LOCK BIT(0)
--
1.7.9.5
--
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