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Message-ID: <20150512184426.GQ3066@sirena.org.uk>
Date: Tue, 12 May 2015 19:44:26 +0100
From: Mark Brown <broonie@...nel.org>
To: Zidan Wang <zidan.wang@...escale.com>
Cc: nicoleotsuka@...il.com, timur@...i.org, Xiubo.Lee@...il.com,
lgirdwood@...il.com, perex@...ex.cz, tiwai@...e.de,
alsa-devel@...a-project.org, linuxppc-dev@...ts.ozlabs.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH 1/3] ASoC: fsl_sai: add sai master mode support
On Mon, May 11, 2015 at 06:24:41PM +0800, Zidan Wang wrote:
> When sai works on master mode, set its bit clock and frame clock.
>
> SAI has 4 MCLK source, bus clock, MCLK1, MCLK2 and MCLK3. fsl_sai_set_bclk
> will select proper MCLK source, then calculate and set the bit clock divider.
Applied, thanks.
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