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Date:	Wed, 13 May 2015 14:47:56 -0700
From:	David Daney <ddaney.cavm@...il.com>
To:	Leonid Yegoshin <Leonid.Yegoshin@...tec.com>
CC:	linux-mips@...ux-mips.org, linux-kernel@...r.kernel.org,
	ralf@...ux-mips.org
Subject: Re: [PATCH] MIPS64: 48 bit physaddr support in memory maps

On 05/13/2015 11:55 AM, Leonid Yegoshin wrote:
> Originally, it was set to 40bits only but I6400 has 48bits of physaddr.
>

Why not go to the architectural limit of 59 bits?


> Signed-off-by: Leonid Yegoshin <Leonid.Yegoshin@...tec.com>
> ---
>   arch/mips/include/asm/addrspace.h |    2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/mips/include/asm/addrspace.h b/arch/mips/include/asm/addrspace.h
> index ba0925c84b75..d54137602ac5 100644
> --- a/arch/mips/include/asm/addrspace.h
> +++ b/arch/mips/include/asm/addrspace.h
> @@ -53,7 +53,7 @@
>    */
>   #define CPHYSADDR(a)		((_ACAST32_(a)) & 0x1fffffff)
>   #define XPHYSADDR(a)		((_ACAST64_(a)) &			\
> -				 _CONST64_(0x000000ffffffffff))
> +				 _CONST64_(0x0000ffffffffffff))
>
>   #ifdef CONFIG_64BIT
>
>
> --
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