linux-kernel - Re: [PATCH 4/7] x86/intel_rdt: Implement scheduling support for Intel RDT

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Message-ID: <alpine.DEB.2.11.1505182042210.4225@nanos>
Date:	Mon, 18 May 2015 20:45:03 +0200 (CEST)
From:	Thomas Gleixner <tglx@...utronix.de>
To:	Vikas Shivappa <vikas.shivappa@...el.com>
cc:	Vikas Shivappa <vikas.shivappa@...ux.intel.com>, x86@...nel.org,
	linux-kernel@...r.kernel.org, hpa@...or.com, mingo@...nel.org,
	tj@...nel.org, peterz@...radead.org, matt.fleming@...el.com,
	will.auld@...el.com, peter.zijlstra@...el.com,
	h.peter.anvin@...el.com, kanaka.d.juvva@...el.com,
	mtosatti@...hat.com
Subject: Re: [PATCH 4/7] x86/intel_rdt: Implement scheduling support for
 Intel RDT

On Mon, 18 May 2015, Vikas Shivappa wrote:
> On Fri, 15 May 2015, Thomas Gleixner wrote:
> > On Mon, 11 May 2015, Vikas Shivappa wrote:
> > > +	/*
> > > +	 * This needs to be fixed
> > > +	 * to cache the whole PQR instead of just CLOSid.
> > > +	 * PQR has closid in high 32 bits and CQM-RMID in low 10 bits.
> > > +	 * Should not write a 0 to the low 10 bits of PQR
> > > +	 * and corrupt RMID.
> > 
> > And why is this not fixed __BEFORE__ this patch? You can do the
> > changes to struct intel_cqm_state in a seperate patch and then do the
> > proper implementation from the beginning instead of providing a half
> > broken variant which gets replaced in the next patch.
> 
> Ok , can fix both items in your comments. Reason I had it seperately is that
> the cache affects both cmt and cache allocation patches.

And that's the wrong reason. Sure it affects both, but we first
prepare the changes to the existing code and then build new stuff on
top of it not the other way round. Building the roof before the
basement is almost never a good idea.

Thanks,

	tglx


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