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Message-ID: <alpine.DEB.2.11.1505212352330.5457@nanos>
Date:	Fri, 22 May 2015 00:00:22 +0200 (CEST)
From:	Thomas Gleixner <tglx@...utronix.de>
To:	Ezequiel Garcia <ezequiel.garcia@...tec.com>
cc:	linux-kernel@...r.kernel.org, linux-mips@...ux-mips.org,
	Daniel Lezcano <daniel.lezcano@...aro.org>,
	devicetree@...r.kernel.org,
	Andrew Bresticker <abrestic@...omium.org>,
	James Hartley <james.hartley@...tec.com>,
	James Hogan <james.hogan@...tec.com>,
	Damien.Horsley@...tec.com, Govindraj.Raja@...tec.com
Subject: Re: [PATCH 6/7] clocksource: Add Pistachio clocksource-only driver

On Thu, 21 May 2015, Ezequiel Garcia wrote:
> +static cycle_t clocksource_read_cycles(struct clocksource *cs)
> +{
> +	u32 counter, overflw;
> +	unsigned long flags;
> +
> +	raw_spin_lock_irqsave(&lock, flags);

Hmm. Is that lock really necessary to read that counter? The
clocksource is global. And if its actually used for timekeeping, the
lock can get heavy contended.

> +	overflw = gpt_readl(TIMER_CURRENT_OVERFLOW_VALUE, 0);
> +	counter = gpt_readl(TIMER_CURRENT_VALUE, 0);
> +	raw_spin_unlock_irqrestore(&lock, flags);
> +
> +	return ~(cycle_t)counter;
> +}

Thanks,

	tglx
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