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Message-ID: <BN3PR0301MB0849D35E915D701DE931EA9081C10@BN3PR0301MB0849.namprd03.prod.outlook.com>
Date:	Thu, 21 May 2015 09:54:20 +0000
From:	Peter Chen <Peter.Chen@...escale.com>
To:	Rob Herring <robh@...nel.org>
CC:	Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
	Kishon Vijay Abraham I <kishon@...com>,
	Linux USB List <linux-usb@...r.kernel.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
	Arnd Bergmann <arnd@...db.de>,
	Alan Stern <stern@...land.harvard.edu>
Subject: RE: [PATCH v2 6/6] usb: chipidea: add work-around for Marvell HSIC
 PHY startup

 
> 
> On Wed, May 20, 2015 at 10:13 PM, Peter Chen <peter.chen@...escale.com>
> wrote:
> > On Tue, May 19, 2015 at 09:10:05PM -0500, Rob Herring wrote:
> >> The Marvell 28nm HSIC PHY requires the port to be forced to HS mode
> >> after the port power is applied. This is done using the test mode in
> >> the PORTSC register.
> >>
> >> As HSIC is always HS, this work-around should be safe to do with all
> >> HSIC PHYs. If not, a flag can also be added.
> >
> > I think a flag is needed, not sure all vendors can work well with that.
> 
> Only i.MX6Sx uses HSIC in mainline. Is that something you can test? It would be
> better to not add flags unless they are really needed.
> Otherwise you end up with dozens of flags like SDHCI drivers have.
> 

I will have a test for this, and show you the result later.

Peter

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