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Message-ID: <555F776E.3070904@imgtec.com>
Date:	Fri, 22 May 2015 11:37:34 -0700
From:	Leonid Yegoshin <Leonid.Yegoshin@...tec.com>
To:	Ralf Baechle <ralf@...ux-mips.org>
CC:	<linux-mips@...ux-mips.org>, <rusty@...tcorp.com.au>,
	<alexinbeijing@...il.com>, <paul.burton@...tec.com>,
	<david.daney@...ium.com>, <alex@...x-smith.me.uk>,
	<linux-kernel@...r.kernel.org>, <james.hogan@...tec.com>,
	<markos.chandras@...tec.com>, <macro@...ux-mips.org>,
	<eunb.song@...sung.com>, <manuel.lauss@...il.com>,
	<andreas.herrmann@...iumnetworks.com>
Subject: Re: [PATCH 1/2] MIPS: MSA: bugfix - disable MSA during thread switch
 correctly

On 05/22/2015 02:38 AM, Ralf Baechle wrote:
> Just move the call to finish_arch_switch(). 

It might be a problem later, then a correct MSA partiton starts working. 
It should be tight to saving MSA registers in that case.

> Your rewrite also dropped the if (cpu_has_msa) condition from 
> disable_msa() probably causing havoc on lots of CPUs which will likely 
> not decode the set bits of the MFC0/MTC0 instructions thus end up 
> accessing Config0. Ralf

Right before this chunk of code there is a saving MSA registers. Does it 
causing a havoc or else?

May I ask you to look into switch_to macro to figure out how "if 
(cpu_has_msa)" check works in this case?

- Leonid.

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