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Message-ID: <5564366D.9090707@atmel.com>
Date: Tue, 26 May 2015 11:01:33 +0200
From: Nicolas Ferre <nicolas.ferre@...el.com>
To: Alexandre Belloni <alexandre.belloni@...e-electrons.com>,
Thierry Reding <thierry.reding@...il.com>
CC: <linux-pwm@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>,
<linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 1/2] PWM: atmel: fix incorrect CDTY value after enabling
Le 25/05/2015 15:19, Alexandre Belloni a écrit :
> CUPD is not flushed before enabling the channel so it will update CDTY/CPRD just
> after one period. So we always set CUPD, even when the channel is not enabled.
>
> Signed-off-by: Alexandre Belloni <alexandre.belloni@...e-electrons.com>
Acked-by: Nicolas Ferre <nicolas.ferre@...el.com>
BTW, is a "stable tag" needed for this one?
> ---
> drivers/pwm/pwm-atmel.c | 35 ++++++++++++++++++-----------------
> 1 file changed, 18 insertions(+), 17 deletions(-)
>
> diff --git a/drivers/pwm/pwm-atmel.c b/drivers/pwm/pwm-atmel.c
> index d3c22de9ee47..89f9ca41d9af 100644
> --- a/drivers/pwm/pwm-atmel.c
> +++ b/drivers/pwm/pwm-atmel.c
> @@ -155,24 +155,25 @@ static void atmel_pwm_config_v1(struct pwm_chip *chip, struct pwm_device *pwm,
> struct atmel_pwm_chip *atmel_pwm = to_atmel_pwm_chip(chip);
> unsigned int val;
>
> - if (test_bit(PWMF_ENABLED, &pwm->flags)) {
> - /*
> - * If the PWM channel is enabled, using the update register,
> - * it needs to set bit 10 of CMR to 0
> - */
> - atmel_pwm_ch_writel(atmel_pwm, pwm->hwpwm, PWMV1_CUPD, dty);
>
> - val = atmel_pwm_ch_readl(atmel_pwm, pwm->hwpwm, PWM_CMR);
> - val &= ~PWM_CMR_UPD_CDTY;
> - atmel_pwm_ch_writel(atmel_pwm, pwm->hwpwm, PWM_CMR, val);
> - } else {
> - /*
> - * If the PWM channel is disabled, write value to duty and
> - * period registers directly.
> - */
> - atmel_pwm_ch_writel(atmel_pwm, pwm->hwpwm, PWMV1_CDTY, dty);
> - atmel_pwm_ch_writel(atmel_pwm, pwm->hwpwm, PWMV1_CPRD, prd);
> - }
> + atmel_pwm_ch_writel(atmel_pwm, pwm->hwpwm, PWMV1_CUPD, dty);
> +
> + val = atmel_pwm_ch_readl(atmel_pwm, pwm->hwpwm, PWM_CMR);
> + val &= ~PWM_CMR_UPD_CDTY;
> + atmel_pwm_ch_writel(atmel_pwm, pwm->hwpwm, PWM_CMR, val);
> +
> + /*
> + * If the PWM channel is enabled, only update CDTY by using the update
> + * register, it needs to set bit 10 of CMR to 0
> + */
> + if (test_bit(PWMF_ENABLED, &pwm->flags))
> + return;
> + /*
> + * If the PWM channel is disabled, write value to duty and period
> + * registers directly.
> + */
> + atmel_pwm_ch_writel(atmel_pwm, pwm->hwpwm, PWMV1_CDTY, dty);
> + atmel_pwm_ch_writel(atmel_pwm, pwm->hwpwm, PWMV1_CPRD, prd);
> }
>
> static void atmel_pwm_config_v2(struct pwm_chip *chip, struct pwm_device *pwm,
>
--
Nicolas Ferre
--
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