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Message-ID: <126375CE-37E2-4406-B4E8-3C991F02A0C1@zytor.com>
Date: Fri, 29 May 2015 15:32:59 -0700
From: "H. Peter Anvin" <hpa@...or.com>
To: Andy Lutomirski <luto@...capital.net>,
"Elliott, Robert (Server Storage)" <Elliott@...com>
CC: Dan Williams <dan.j.williams@...el.com>,
"Kani, Toshimitsu" <toshi.kani@...com>,
Borislav Petkov <bp@...en8.de>,
Ross Zwisler <ross.zwisler@...ux.intel.com>,
Thomas Gleixner <tglx@...utronix.de>,
Ingo Molnar <mingo@...hat.com>,
Andrew Morton <akpm@...ux-foundation.org>,
Arnd Bergmann <arnd@...db.de>,
"linux-mm@...ck.org" <linux-mm@...ck.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
X86 ML <x86@...nel.org>,
"linux-nvdimm@...ts.01.org" <linux-nvdimm@...1.01.org>,
Juergen Gross <jgross@...e.com>,
Stefan Bader <stefan.bader@...onical.com>,
Henrique de Moraes Holschuh <hmh@....eng.br>,
Yigal Korman <yigal@...xistor.com>,
Konrad Rzeszutek Wilk <konrad.wilk@...cle.com>,
Luis Rodriguez <mcgrof@...e.com>,
Christoph Hellwig <hch@....de>,
Matthew Wilcox <willy@...ux.intel.com>
Subject: Re: [PATCH v10 12/12] drivers/block/pmem: Map NVDIMM with ioremap_wt()
Nontemporal stores to WB memory is fine in such a way that it doesn't pollute the cache. This can be done by denoting to WC or by forcing cache allocation out of only a subset of the cache.
On May 29, 2015 2:46:19 PM PDT, Andy Lutomirski <luto@...capital.net> wrote:
>On Fri, May 29, 2015 at 2:29 PM, Elliott, Robert (Server Storage)
><Elliott@...com> wrote:
>>> -----Original Message-----
>>> From: Andy Lutomirski [mailto:luto@...capital.net]
>>> Sent: Friday, May 29, 2015 1:35 PM
>> ...
>>> Whoa, there! Why would we use non-temporal stores to WB memory to
>>> access persistent memory? I can see two reasons not to:
>>
>> Data written to a block storage device (here, the NVDIMM) is unlikely
>> to be read or written again any time soon. It's not like the code
>> and data that a program has in memory, where there might be a loop
>> accessing the location every CPU clock; it's storage I/O to
>> historically very slow (relative to the CPU clock speed) devices.
>> The source buffer for that data might be frequently accessed,
>> but not the NVDIMM storage itself.
>>
>> Non-temporal stores avoid wasting cache space on these "one-time"
>> accesses. The same applies for reads and non-temporal loads.
>> Keep the CPU data cache lines free for the application.
>>
>> DAX and mmap() do change that; the application is now free to
>> store frequently accessed data structures directly in persistent
>> memory. But, that's not available if btt is used, and
>> application loads and stores won't go through the memcpy()
>> calls inside pmem anyway. The non-temporal instructions are
>> cache coherent, so data integrity won't get confused by them
>> if I/O going through pmem's block storage APIs happens
>> to overlap with the application's mmap() regions.
>>
>
>You answered the wrong question. :) I understand the point of the
>non-temporal stores -- I don't understand the point of using
>non-temporal stores to *WB memory*. I think we should be okay with
>having the kernel mapping use WT instead.
>
>--Andy
--
Sent from my mobile phone. Please pardon brevity and lack of formatting.
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