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Date:	Mon, 1 Jun 2015 10:58:21 +0200
From:	Ingo Molnar <mingo@...nel.org>
To:	Andy Lutomirski <luto@...capital.net>
Cc:	"Elliott, Robert (Server Storage)" <Elliott@...com>,
	Dan Williams <dan.j.williams@...el.com>,
	"Kani, Toshimitsu" <toshi.kani@...com>,
	Borislav Petkov <bp@...en8.de>,
	Ross Zwisler <ross.zwisler@...ux.intel.com>,
	"H. Peter Anvin" <hpa@...or.com>,
	Thomas Gleixner <tglx@...utronix.de>,
	Ingo Molnar <mingo@...hat.com>,
	Andrew Morton <akpm@...ux-foundation.org>,
	Arnd Bergmann <arnd@...db.de>,
	"linux-mm@...ck.org" <linux-mm@...ck.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	X86 ML <x86@...nel.org>,
	"linux-nvdimm@...ts.01.org" <linux-nvdimm@...ts.01.org>,
	Juergen Gross <jgross@...e.com>,
	Stefan Bader <stefan.bader@...onical.com>,
	Henrique de Moraes Holschuh <hmh@....eng.br>,
	Yigal Korman <yigal@...xistor.com>,
	Konrad Rzeszutek Wilk <konrad.wilk@...cle.com>,
	Luis Rodriguez <mcgrof@...e.com>,
	Christoph Hellwig <hch@....de>,
	Matthew Wilcox <willy@...ux.intel.com>
Subject: Re: [PATCH v10 12/12] drivers/block/pmem: Map NVDIMM with
 ioremap_wt()


* Andy Lutomirski <luto@...capital.net> wrote:

> You answered the wrong question. :) I understand the point of the non-temporal 
> stores -- I don't understand the point of using non-temporal stores to *WB 
> memory*.  I think we should be okay with having the kernel mapping use WT 
> instead.

WB memory is write-through, but they are still fully cached for reads.

So non-temporal instructions influence how the CPU will allocate (or not allocate) 
WT cache lines.

Thanks,

	Ingo
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