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Message-ID: <20150602202037.GO1187@tassilo.jf.intel.com>
Date:	Tue, 2 Jun 2015 13:20:37 -0700
From:	Andi Kleen <ak@...ux.intel.com>
To:	Andy Lutomirski <luto@...capital.net>
Cc:	Thomas Gleixner <tglx@...utronix.de>,
	Adrian Hunter <adrian.hunter@...el.com>,
	LKML <linux-kernel@...r.kernel.org>,
	Linus Torvalds <torvalds@...ux-foundation.org>,
	X86 ML <x86@...nel.org>, "H. Peter Anvin" <hpa@...or.com>,
	Len Brown <lenb@...nel.org>
Subject: Re: [PATCH RFC] x86, tsc: Allow for high latency in
 quick_pit_calibrate()
> There's the code in tsc_msr.c.  It should be relatively
> straightforward to extend it to cover everything that intel_pstate
> supports.
That's a good idea, but we still need an always working fallback when the
model number is not available. So Adrian's patch is needed in any
case.
-Andi
-- 
ak@...ux.intel.com -- Speaking for myself only
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