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Message-ID: <alpine.DEB.2.11.1506022302340.20347@nanos>
Date: Tue, 2 Jun 2015 23:03:26 +0200 (CEST)
From: Thomas Gleixner <tglx@...utronix.de>
To: Andi Kleen <ak@...ux.intel.com>
cc: Andy Lutomirski <luto@...capital.net>,
Adrian Hunter <adrian.hunter@...el.com>,
LKML <linux-kernel@...r.kernel.org>,
Linus Torvalds <torvalds@...ux-foundation.org>,
X86 ML <x86@...nel.org>, "H. Peter Anvin" <hpa@...or.com>,
Len Brown <lenb@...nel.org>
Subject: Re: [PATCH RFC] x86, tsc: Allow for high latency in
quick_pit_calibrate()
On Tue, 2 Jun 2015, Andi Kleen wrote:
> > There's the code in tsc_msr.c. It should be relatively
> > straightforward to extend it to cover everything that intel_pstate
> > supports.
>
> That's a good idea, but we still need an always working fallback when the
> model number is not available. So Adrian's patch is needed in any
> case.
Nonsense. The slow calibration is already a working fallback.
Thanks,
tglx
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