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Message-ID: <20150610081432.GY26425@suse.de>
Date: Wed, 10 Jun 2015 09:14:32 +0100
From: Mel Gorman <mgorman@...e.de>
To: Ingo Molnar <mingo@...nel.org>
Cc: Andrew Morton <akpm@...ux-foundation.org>,
Rik van Riel <riel@...hat.com>,
Hugh Dickins <hughd@...gle.com>,
Minchan Kim <minchan@...nel.org>,
Dave Hansen <dave.hansen@...el.com>,
Andi Kleen <andi@...stfloor.org>,
H Peter Anvin <hpa@...or.com>,
Linus Torvalds <torvalds@...ux-foundation.org>,
Thomas Gleixner <tglx@...utronix.de>,
Peter Zijlstra <a.p.zijlstra@...llo.nl>,
Linux-MM <linux-mm@...ck.org>,
LKML <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 2/4] mm: Send one IPI per CPU to TLB flush all entries
after unmapping pages
On Wed, Jun 10, 2015 at 09:47:04AM +0200, Ingo Molnar wrote:
>
> * Mel Gorman <mgorman@...e.de> wrote:
>
> > --- a/include/linux/sched.h
> > +++ b/include/linux/sched.h
> > @@ -1289,6 +1289,18 @@ enum perf_event_task_context {
> > perf_nr_task_contexts,
> > };
> >
> > +/* Track pages that require TLB flushes */
> > +struct tlbflush_unmap_batch {
> > + /*
> > + * Each bit set is a CPU that potentially has a TLB entry for one of
> > + * the PFNs being flushed. See set_tlb_ubc_flush_pending().
> > + */
> > + struct cpumask cpumask;
> > +
> > + /* True if any bit in cpumask is set */
> > + bool flush_required;
> > +};
> > +
> > struct task_struct {
> > volatile long state; /* -1 unrunnable, 0 runnable, >0 stopped */
> > void *stack;
> > @@ -1648,6 +1660,10 @@ struct task_struct {
> > unsigned long numa_pages_migrated;
> > #endif /* CONFIG_NUMA_BALANCING */
> >
> > +#ifdef CONFIG_ARCH_WANT_BATCHED_UNMAP_TLB_FLUSH
> > + struct tlbflush_unmap_batch *tlb_ubc;
> > +#endif
>
> Please embedd this constant size structure in task_struct directly so that the
> whole per task allocation overhead goes away:
>
That puts a structure (72 bytes in the config I used) within the task struct
even when it's not required. On a lightly loaded system direct reclaim
will not be active and for some processes, it'll never be active. It's
very wasteful.
--
Mel Gorman
SUSE Labs
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