linux-kernel - Re: [PATCH 10/10] x86/intel_rdt: Intel haswell Cache Allocation enumeration

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Message-ID: <20150615140503.GD3644@twins.programming.kicks-ass.net>
Date:	Mon, 15 Jun 2015 16:05:03 +0200
From:	Peter Zijlstra <peterz@...radead.org>
To:	Vikas Shivappa <vikas.shivappa@...ux.intel.com>
Cc:	linux-kernel@...r.kernel.org, vikas.shivappa@...el.com,
	x86@...nel.org, hpa@...or.com, tglx@...utronix.de,
	mingo@...nel.org, matt.fleming@...el.com, will.auld@...el.com,
	linux-rdt@...ists.intel.com
Subject: Re: [PATCH 10/10] x86/intel_rdt: Intel haswell Cache Allocation
 enumeration

On Fri, Jun 12, 2015 at 11:17:17AM -0700, Vikas Shivappa wrote:
> +	/*
> +	 * Probe test for Haswell CPUs.
> +	 */
> +	if (c->x86 == 0x6 && c->x86_model == 0x3f)
> +		return hsw_probetest();

Firstly, isn't a probe already a test?

Secondly, there's more HSW models:

        case 60: /* 22nm Haswell Core */
        case 63: /* 22nm Haswell Server */
        case 69: /* 22nm Haswell ULT */
        case 70: /* 22nm Haswell + GT3e (Intel Iris Pro graphics) */

Is this really only HSW server, or should they all be listed?
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