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Message-ID: <m37fqws3wp.fsf@t19.piap.pl>
Date:	Mon, 22 Jun 2015 07:33:42 +0200
From:	khalasa@...p.pl (Krzysztof HaƂasa)
To:	Joe Perches <joe@...ches.com>
Cc:	Frans Klaver <fransklaver@...il.com>,
	Andy Whitcroft <apw@...onical.com>,
	lkml <linux-kernel@...r.kernel.org>
Subject: Re: Coding style details (checkpatch)

Joe Perches <joe@...ches.com> writes:

> How is the macro used?
> #define REG8_1(a0) ((const u16[8]){a0, a0 + 1, a0 + 2, a0 + 3})

#define REG8_1(a0) ((const u16[8]){a0, a0 + 1, a0 + 2, a0 + 3, a0 + 4, a0 + 5, a0 + 6, a0 + 7})
#define REG8_2(a0) ((const u16[8]){a0, a0 + 2, a0 + 4, a0 + 6, a0 + 8, a0 + 0xA, a0 + 0xC, a0 + 0xE})
#define REG8_8(a0) ((const u16[8]){a0, a0 + 8, a0 + 0x10, a0 + 0x18, a0 + 0x20, a0 + 0x28, a0 + 0x30, a0 + 0x38})

#define VDMA_CHANNEL_CONFIG     REG8_1(0x10)
#define ADMA_P_ADDR             REG8_2(0x18)
#define ADMA_B_ADDR             REG8_2(0x19)
#define INTL_HBAR_CTRL          REG8_1(0x30)
#define VIDEO_FIELD_CTRL        REG8_1(0x39)
#define HSCALER_CTRL            REG8_1(0x42)
#define VIDEO_SIZE              REG8_1(0x4A)
#define VIDEO_SIZE_F2           REG8_1(0x52)
#define MD_CONF                 REG8_1(0x60)
#define MD_INIT                 REG8_1(0x68)
#define MD_MAP0                 REG8_1(0x70)
#define VDMA_P_ADDR             REG8_8(0x80) /* not used in DMA SG mode */
#define VDMA_WHP                REG8_8(0x81)
#define VDMA_B_ADDR             REG8_8(0x82)
#define VDMA_F2_P_ADDR          REG8_8(0x84)
#define VDMA_F2_WHP             REG8_8(0x85)
#define VDMA_F2_B_ADDR          REG8_8(0x86)

then
        reg_write(vc->dev, VDMA_CHANNEL_CONFIG[vc->ch], dma_cfg);
        reg_write(dev, SAT_U[ch], ctrl->val);
        reg_write(dev, SAT_V[ch], ctrl->val);

etc.
-- 
Krzysztof Halasa

Industrial Research Institute for Automation and Measurements PIAP
Al. Jerozolimskie 202, 02-486 Warsaw, Poland
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