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Date:	Tue, 23 Jun 2015 23:19:42 +0200
From:	Paul Osmialowski <pawelo@...g.net.pl>
To:	Andrew Morton <akpm@...ux-foundation.org>,
	Anson Huang <b20788@...escale.com>,
	Ard Biesheuvel <ard.biesheuvel@...aro.org>,
	Arnd Bergmann <arnd@...db.de>,
	Bhupesh Sharma <bhupesh.sharma@...escale.com>,
	Daniel Lezcano <daniel.lezcano@...aro.org>,
	Frank Li <Frank.Li@...escale.com>,
	Geert Uytterhoeven <geert+renesas@...der.be>,
	Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
	Guenter Roeck <linux@...ck-us.net>,
	Haojian Zhuang <haojian.zhuang@...il.com>,
	Ian Campbell <ijc+devicetree@...lion.org.uk>,
	Jingchang Lu <jingchang.lu@...escale.com>,
	Jiri Slaby <jslaby@...e.cz>, Kees Cook <keescook@...omium.org>,
	Kumar Gala <galak@...eaurora.org>,
	Laurent Pinchart <laurent.pinchart@...asonboard.com>,
	Linus Walleij <linus.walleij@...aro.org>,
	Magnus Damm <damm+renesas@...nsource.se>,
	Michael Turquette <mturquette@...libre.com>,
	Nathan Lynch <nathan_lynch@...tor.com>,
	Nicolas Pitre <nico@...aro.org>,
	Maxime Coquelin stm32 <mcoquelin.stm32@...il.com>,
	Olof Johansson <olof@...om.net>,
	Paul Bolle <pebolle@...cali.nl>,
	Rob Herring <r.herring@...escale.com>,
	Rob Herring <robh+dt@...nel.org>,
	Russell King <linux@....linux.org.uk>,
	Sergey Senozhatsky <sergey.senozhatsky@...il.com>,
	Shawn Guo <shawn.guo@...aro.org>,
	Simon Horman <horms+renesas@...ge.net.au>,
	Stefan Agner <stefan@...er.ch>,
	Stephen Boyd <sboyd@...eaurora.org>,
	Thomas Gleixner <tglx@...utronix.de>,
	Uwe Kleine-Koenig <u.kleine-koenig@...gutronix.de>,
	Catalin Marinas <catalin.marinas@....com>,
	Dave Martin <Dave.Martin@....com>,
	Mark Rutland <mark.rutland@....com>,
	Pawel Moll <pawel.moll@....com>, linux-kernel@...r.kernel.org,
	linux-arm-kernel@...ts.infradead.org, linux-clk@...r.kernel.org,
	linux-gpio@...r.kernel.org, linux-serial@...r.kernel.org,
	devicetree@...r.kernel.org, dmaengine@...r.kernel.org
Cc:	Paul Osmialowski <pawelo@...g.net.pl>,
	Yuri Tikhonov <yur@...raft.com>,
	Sergei Poselenov <sposelenov@...raft.com>,
	Dmitry Cherkassov <d_cherkasov@...raft.com>,
	Alexander Potashev <aspotashev@...raft.com>
Subject: [PATCH 4/9] arm: allow copying of vector table to internal SRAM memory

Based on part of the commit published on Emcraft git repo:

https://github.com/EmcraftSystems/linux-emcraft.git

2ce1841b590d014d8738215fb1ffe05f53c8d9f0 "some commit"

by: Dmitry Cherkassov <d_cherkasov@...raft.com>

The ARM v7M allows setting the vector table either in
the boot memory or in the internal SRAM memory, controlled
by Bit 29 in the Vector Table Base register. This implies
that the OS vector table needs to be copied to the internal RAM.

New option CONFIG_COPY_VECTOR_TABLE_TO_SRAM_ADDR allows specification
of the desired destination for the OS vector table.

Signed-off-by: Paul Osmialowski <pawelo@...g.net.pl>
---
 arch/arm/Kconfig-nommu      | 11 +++++++++++
 arch/arm/kernel/entry-v7m.S |  3 +++
 arch/arm/mm/proc-v7m.S      | 11 +++++++++++
 3 files changed, 25 insertions(+)

diff --git a/arch/arm/Kconfig-nommu b/arch/arm/Kconfig-nommu
index 965ca97..98220e8 100644
--- a/arch/arm/Kconfig-nommu
+++ b/arch/arm/Kconfig-nommu
@@ -66,3 +66,14 @@ config ARM_MPU
 config ZLIB_INFLATE_STACK_SAVING
 	bool 'Do not place huge encoder tables on stack' if ZLIB_INFLATE
 	depends on ZLIB_INFLATE
+
+config COPY_VECTOR_TABLE_TO_SRAM_ADDR
+	hex 'If non-zero, copy Vector Table to this SRAM Address' if CPU_V7M
+	default 0x00000000
+	depends on CPU_V7M
+	help
+	  The ARM v7M allows setting the vector table either in
+	  the boot memory or in the internal SRAM memory, controlled
+	  by Bit 29 in the Vector Table Base register.
+	  This implies that the OS vector table needs to be copied to
+	  the internal RAM.
diff --git a/arch/arm/kernel/entry-v7m.S b/arch/arm/kernel/entry-v7m.S
index b6c8bb9..114096e 100644
--- a/arch/arm/kernel/entry-v7m.S
+++ b/arch/arm/kernel/entry-v7m.S
@@ -146,3 +146,6 @@ ENTRY(vector_table)
 	.rept	CONFIG_CPU_V7M_NUM_IRQ
 	.long	__irq_entry		@ External Interrupts
 	.endr
+#if CONFIG_COPY_VECTOR_TABLE_TO_SRAM_ADDR > 0x00000000
+ENTRY(vector_table_end)
+#endif
diff --git a/arch/arm/mm/proc-v7m.S b/arch/arm/mm/proc-v7m.S
index 67d9209..ded9504 100644
--- a/arch/arm/mm/proc-v7m.S
+++ b/arch/arm/mm/proc-v7m.S
@@ -83,7 +83,18 @@ ENDPROC(cpu_v7m_do_resume)
 __v7m_setup:
 	@ Configure the vector table base address
 	ldr	r0, =BASEADDR_V7M_SCB
+#if CONFIG_COPY_VECTOR_TABLE_TO_SRAM_ADDR > 0x00000000
+	ldr	r12, =CONFIG_COPY_VECTOR_TABLE_TO_SRAM_ADDR
+	mov	r5, r12			@ Copy the kernel vector_table to
+	ldr	r6, =vector_table	@ the in-SRAM vector table
+	ldr	r4, =vector_table_end
+1:	ldr	r3, [r6], #4
+	str	r3, [r5], #4
+	cmp	r6, r4
+	bne	1b			@ End of the copy code
+#else
 	ldr	r12, =vector_table
+#endif
 	str	r12, [r0, V7M_SCB_VTOR]
 
 	@ enable UsageFault, BusFault and MemManage fault.
-- 
2.3.6

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