[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20150630135815.GK27725@arm.com>
Date: Tue, 30 Jun 2015 14:58:15 +0100
From: Will Deacon <will.deacon@....com>
To: Timur Tabi <timur@...eaurora.org>
Cc: "linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
Shanker Donthineni <shankerd@...eaurora.org>,
"awallis@...eaurora.org" <awallis@...eaurora.org>,
"abhimany@...eaurora.org" <abhimany@...eaurora.org>,
"sboyd@...eaurora.org" <sboyd@...eaurora.org>,
Vipul Gandhi <vgandhi@...eaurora.org>
Subject: Re: [PATCH 1/3] hvc_dcc: bind driver to core0 for reads and writes
On Fri, Jun 26, 2015 at 07:52:34PM +0100, Timur Tabi wrote:
> Some debuggers, such as Trace32 from Lauterbach GmbH, do not handle
> reads/writes from/to DCC on secondary cores. Each core has its
> own DCC device registers, so when a core reads or writes from/to DCC,
> it only accesses its own DCC device. Since kernel code can run on
> any core, every time the kernel wants to write to the console, it
> might write to a different DCC.
>
> In SMP mode, Trace32 only uses the DCC on core 0. In AMP mode, it
> creates multiple windows, and each window shows the DCC output
> only from that core's DCC. The result is that console output is
> either lost or scattered across windows.
>
> Selecting this option will enable code that serializes all console
> input and output to core 0. The DCC driver will create input and
> output FIFOs that all cores will use. Reads and writes from/to DCC
> are handled by a workqueue that runs only core 0.
What happens if CPU0 is hotplugged off?
Will
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
Powered by blists - more mailing lists