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Message-ID: <20150706204528.0eb416bc@xhacker>
Date: Mon, 6 Jul 2015 20:45:28 +0800
From: Jisheng Zhang <jszhang@...vell.com>
To: Thomas Gleixner <tglx@...utronix.de>
CC: Sebastian Hesselbarth <sebastian.hesselbarth@...il.com>,
Mark Rutland <mark.rutland@....com>,
Jason Cooper <jason@...edaemon.net>,
LKML <linux-kernel@...r.kernel.org>
Subject: Re: [patch] irqchip/dw-apb-ictl: Fix generic domain chip wreckage
On Mon, 6 Jul 2015 14:36:40 +0200
Thomas Gleixner <tglx@...utronix.de> wrote:
> On Mon, 6 Jul 2015, Jisheng Zhang wrote:
> > > Thomas Gleixner <tglx@...utronix.de> wrote:
> > the following patch seems fix the panic, but I dunno whether it's correct or not,
> > could you please help to check?
> >
> > Thanks,
> > Jisheng
> >
> > diff --git a/drivers/irqchip/irq-dw-apb-ictl.c b/drivers/irqchip/irq-dw-apb-ictl.c
> > index f4a0e11..8d996cb 100644
> > --- a/drivers/irqchip/irq-dw-apb-ictl.c
> > +++ b/drivers/irqchip/irq-dw-apb-ictl.c
> > @@ -30,13 +30,14 @@
> > static void dw_apb_ictl_handler(unsigned int irq, struct irq_desc *desc)
> > {
> > struct irq_domain *d = irq_desc_get_handler_data(desc);
> > - struct irq_chip_generic *gc = irq_get_domain_generic_chip(d, 0);
> > + struct irq_chip_generic *gc;
> > struct irq_chip *chip = irq_desc_get_chip(desc);
> > int n;
> >
> > chained_irq_enter(chip, desc);
> >
> > - for (n = 0; n < d->gc->num_chips; n++, gc++) {
> > + for (n = 0; n < d->gc->num_chips; n++) {
> > + gc = irq_get_domain_generic_chip(d, n * 32);
> > u32 stat = readl_relaxed(gc->reg_base + APB_INT_FINALSTATUS_L);
>
> Yes it's correct. Seems I tried to be overly clever by avoiding the
> lookup of the second chip. Will fold back.
>
Great! Feel free to add my Tested-by.
I'll also cherry-pick your patch into marvell internal repo.
Thank you very much,
Jisheng
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