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Message-ID: <CAMo8BfLgMY25w6j3=4qy9Lu+2p62U_teXi4=-jqrCM7bHKDnKQ@mail.gmail.com>
Date: Mon, 6 Jul 2015 17:22:33 +0300
From: Max Filippov <jcmvbkbc@...il.com>
To: Peter Zijlstra <peterz@...radead.org>
Cc: "linux-xtensa@...ux-xtensa.org" <linux-xtensa@...ux-xtensa.org>,
LKML <linux-kernel@...r.kernel.org>,
Chris Zankel <chris@...kel.net>,
Marc Gauthier <marc@...ence.com>,
Paul Mackerras <paulus@...ba.org>,
Ingo Molnar <mingo@...hat.com>,
Arnaldo Carvalho de Melo <acme@...nel.org>
Subject: Re: [PATCH 7/8] xtensa: implement counting and sampling perf events
On Mon, Jul 6, 2015 at 5:05 PM, Peter Zijlstra <peterz@...radead.org> wrote:
> On Mon, Jul 06, 2015 at 04:56:09PM +0300, Max Filippov wrote:
>> On Mon, Jul 6, 2015 at 4:47 PM, Peter Zijlstra <peterz@...radead.org> wrote:
>> > On Mon, Jul 06, 2015 at 04:32:48PM +0300, Max Filippov wrote:
>> >> +static int __init xtensa_pmu_init(void)
>> >> +{
>> >> + int ret;
>> >> + int irq = irq_create_mapping(NULL, XCHAL_PROFILING_INTERRUPT);
>> >
>> > Does this platform have interrupt priorities which you can partially
>> > mask in order to create NMI like behaviour?
>>
>> Not sure what you mean by "NMI like".
>
> There's a number of archs where we implement NMIs by having
> local_irq_disable() only disable part of the interrupt priority range
> and making sure all 'normal' IRQs are mapped in that priority range.
>
> We then map our NMI handlers to a priority above the 'normal' range,
> such that these interrupts can indeed happen when interrupts are
> 'disabled.
>
> See for example:
>
> b4f4372f96e0 ("sparc64: Make %pil level 15 a pseudo-NMI.")
> 0c25e9e6cbe7 ("sparc64: Adjust __raw_local_irq_save() to cooperate in NMIs.")
> c011f80ba091 ("sparc64: Add some more commentary to __raw_local_irq_save()")
Ok, I see. I guess I can change IRQ disabling logic to not mask perf IRQ
in case it's configured as the only interrupt on its level and it's the highest
medium-level IRQ.
>> Interrupt priorities are fixed in the current xtensa architecture, and
>> we can in theory mask certain level and below, but practically we
>> always mask all low- and medium- level interrupts.
>>
>> Also we currently can't have handlers for high priority interrupts written in C.
>
> Why not? Surely this can be cured with an assembly stub?
IIUC that was a deliberate architecture design choice and working around
it penalizes all interrupt handlers. But let me take another close look.
> The advantage of having NMIs is that profiling information for the
> kernel becomes much more useful. Without this local_irq_enable() will be
> a very 'hot' function.
I haven't noticed that in my testing.
--
Thanks.
-- Max
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