linux-kernel - RE: [PATCH v5 2/2] dma: Add Xilinx AXI Central Direct Memory Access Engine driver support

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Date:	Tue, 7 Jul 2015 15:32:05 +0000
From:	Appana Durga Kedareswara Rao <appana.durga.rao@...inx.com>
To:	Vinod Koul <vinod.koul@...el.com>
CC:	"dan.j.williams@...el.com" <dan.j.williams@...el.com>,
	Michal Simek <michals@...inx.com>,
	Soren Brinkmann <sorenb@...inx.com>,
	Anirudha Sarangi <anirudh@...inx.com>,
	Punnaiah Choudary Kalluri <punnaia@...inx.com>,
	"dmaengine@...r.kernel.org" <dmaengine@...r.kernel.org>,
	"linux-arm-kernel@...ts.infradead.org" 
	<linux-arm-kernel@...ts.infradead.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	Srikanth Thokala <sthokal@...inx.com>
Subject: RE: [PATCH v5 2/2] dma: Add Xilinx AXI Central Direct Memory Access
 Engine driver support

Hi Vinod,


> -----Original Message-----
> From: Vinod Koul [mailto:vinod.koul@...el.com]
> Sent: Saturday, June 27, 2015 7:49 PM
> To: Appana Durga Kedareswara Rao
> Cc: dan.j.williams@...el.com; Michal Simek; Soren Brinkmann; Anirudha
> Sarangi; Punnaiah Choudary Kalluri; dmaengine@...r.kernel.org; linux-arm-
> kernel@...ts.infradead.org; linux-kernel@...r.kernel.org; Srikanth Thokala
> Subject: Re: [PATCH v5 2/2] dma: Add Xilinx AXI Central Direct Memory
> Access Engine driver support
> 
> On Wed, Jun 24, 2015 at 05:12:12PM +0000, Appana Durga Kedareswara Rao
> wrote:
> 
> Please *fix* you MUA to wrap lines properly

Ok will take care next time onwards

> 
> > > > +
> > > > +   if (cfg->reset)
> > > > +           return xilinx_cdma_chan_reset(chan);
> > > Why do you want to reset this externally, that sounds bad to me
> > If someone (client driver) want to reset the controller externally. It will be
> useful right?
> And why would they want to do that? There might be some other clients
> using
> other channels, doesnt sound good design to me. What is the motivation
> here...

If the client want to reset the channel in case of errors I thought providing this 
API may be helpful. Any way terminate_all API will do the resetting of the channel 
And does the cleanup of the lists that will be useful in case of errors.
Will remove this API.

> 
> >
> >
> > >
> > > > +
> > > > +   if (cfg->coalesc <= XILINX_CDMA_COALESCE_MAX) {
> > > > +           reg &= ~XILINX_CDMA_XR_COALESCE_MASK;
> > > > +           reg |= cfg->coalesc << XILINX_CDMA_COALESCE_SHIFT;
> > > > +   }
> > > Can you explain what coalesc means here?
> >
> > Coalesc means interrupt threshold
> > This value is used for setting the interrupt threshold. When IOC (interrupt
> on complete) interrupt events occur, an internal counter
> > Counts down from the Interrupt Threshold setting. When the count
> reaches zero, an interrupt out is generated by the DMA engine.
> > This will be useful in case of SG transfer.
> IIUC, on IOC controller will count this threshold and then generate
> interrupt out?
> 

Yes IOC controller will count this threshold.

> 
> >
> > This email and any attachments are intended for the sole use of the named
> recipient(s) and contain(s) confidential information that may be proprietary,
> privileged or copyrighted under applicable law. If you are not the intended
> recipient, do not read, copy, or forward this email message or any
> attachments. Delete this email message and any attachments immediately.
> >
> Thats cute!

I have fixed it now sorry for the noise.

Regards,
Kedar.

> 
> --
> ~Vinod
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