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Message-ID: <20150714163342.GA8512@deathray>
Date: Tue, 14 Jul 2015 11:33:42 -0500
From: Michael Welling <mwelling@...e.org>
To: Pali Rohár <pali.rohar@...il.com>
Cc: Sebastian Reichel <sre@...nel.org>,
Tony Lindgren <tony@...mide.com>, Pavel Machek <pavel@....cz>,
Ivaylo Dimitrov <ivo.g.dimitrov.75@...il.com>,
Aaro Koskinen <aaro.koskinen@....fi>,
Nishanth Menon <nm@...com>, linux-omap@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: Re: linux 4.2-rc1 broken Nokia N900
On Tue, Jul 14, 2015 at 09:14:12AM +0200, Pali Rohár wrote:
> On Monday 13 July 2015 17:36:07 Michael Welling wrote:
> > On Tue, Jul 14, 2015 at 12:02:44AM +0200, Pali Rohár wrote:
> > > I think nothing special. I just call:
> > >
> > > export ARCH=arm
> > > export CROSS_COMPILE=arm-linux-gnueabi-
> > > make rx51_defconfig
> > > rm -f arch/arm/boot/zImage
> > > make -j12 zImage modules omap3-n900.dtb CONFIG_DEBUG_SECTION_MISMATCH=y
> > > cat arch/arm/boot/zImage arch/arm/boot/dts/omap3-n900.dtb > arch/arm/boot/zImage.new
> > > mv arch/arm/boot/zImage.new arch/arm/boot/zImage
> > >
> >
> > Where are you getting rx51_defconfig from?
> >
> > This does not appear to be in the kernel source any longer.
> >
> > Can you try the above with omap2plus_defconfig?
> >
>
> It is in my linux-n900 repository: https://github.com/pali/linux-n900
> Repository contains more n900 specific patches but SPI code is unpatched
>
> https://github.com/pali/linux-n900/blob/HEAD/arch/arm/configs/rx51_defconfig
>
> Later in week I can try to compile also with omap2plus_defconfig...
> But in my opinion kernel should not crash with different configuration.
True.
Could you try the following change to the set_cs function and see if it helps.
diff --git a/drivers/spi/spi-omap2-mcspi.c b/drivers/spi/spi-omap2-mcspi.c
index 5867384..666038b 100644
--- a/drivers/spi/spi-omap2-mcspi.c
+++ b/drivers/spi/spi-omap2-mcspi.c
@@ -245,16 +245,18 @@ static void omap2_mcspi_set_enable(const struct spi_device *spi, int enable)
static void omap2_mcspi_set_cs(struct spi_device *spi, bool enable)
{
+ struct omap2_mcspi_cs *cs = spi->controller_state;
u32 l;
- /* The controller handles the inverted chip selects
- * using the OMAP2_MCSPI_CHCONF_EPOL bit so revert
- * the inversion from the core spi_set_cs function.
- */
- if (spi->mode & SPI_CS_HIGH)
- enable = !enable;
+ if (cs) {
+
+ /* The controller handles the inverted chip selects
+ * using the OMAP2_MCSPI_CHCONF_EPOL bit so revert
+ * the inversion from the core spi_set_cs function.
+ */
+ if (spi->mode & SPI_CS_HIGH)
+ enable = !enable;
- if (spi->controller_state) {
l = mcspi_cached_chconf0(spi);
if (enable)
--
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