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Message-ID: <20150720164241.GA5930@earth>
Date: Mon, 20 Jul 2015 18:42:42 +0200
From: Sebastian Reichel <sre@...nel.org>
To: Josh Wu <josh.wu@...el.com>
Cc: Nicolas Ferre <nicolas.ferre@...el.com>,
linux-arm-kernel@...ts.infradead.org,
Guenter Roeck <linux@...ck-us.net>,
Kumar Gala <galak@...eaurora.org>,
Ian Campbell <ijc+devicetree@...lion.org.uk>,
Rob Herring <robh+dt@...nel.org>,
Ben Dooks <ben.dooks@...ethink.co.uk>,
Krzysztof Kozlowski <k.kozlowski.k@...il.com>,
Alexandre Belloni <alexandre.belloni@...e-electrons.com>,
Pawel Moll <pawel.moll@....com>, devicetree@...r.kernel.org,
linux-pm@...r.kernel.org, Sudeep Holla <sudeep.holla@....com>,
Wei Yongjun <yongjun_wei@...ndmicro.com.cn>,
Fabian Frederick <fabf@...net.be>,
linux-kernel@...r.kernel.org,
Boris Brezillon <boris.brezillon@...e-electrons.com>,
Dmitry Eremin-Solenikov <dbaryshkov@...il.com>,
David Woodhouse <dwmw2@...radead.org>,
Mark Rutland <mark.rutland@....com>,
Maxime Ripard <maxime.ripard@...e-electrons.com>
Subject: Re: [PATCH v2 1/2] power: reset: at91: add sama5d3 reset function
Hi,
On Mon, Jul 20, 2015 at 05:32:05PM +0800, Josh Wu wrote:
> This patch introduces a new compatible string: "atmel,sama5d3-rstc" and
> new reset function for sama5d3 and later chips.
>
> As in sama5d3 or later chips, we don't have to shutdown the DDR
> controller before reset. Shutdown the DDR controller before reset is a
> workaround to avoid DDR signal driving the bus, but since sama5d3 and
> later chips there is no such a conflict.
>
> So in this patch:
> 1. the sama5d3 reset function only need to write the rstc register
> and return.
> 2. we can remove the code related with sama5d3 DDR controller as
> we don't use it at all.
>
> Signed-off-by: Josh Wu <josh.wu@...el.com>
> Acked-by: Nicolas Ferre <nicolas.ferre@...el.com>
queued.
-- Sebastian
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