Message-Id: <1437407346-31186-1-git-send-email-kan.liang@intel.com>
Date:	Mon, 20 Jul 2015 11:49:06 -0400
From:	Kan Liang <kan.liang@...el.com>
To:	a.p.zijlstra@...llo.nl
Cc:	mingo@...hat.com, acme@...nel.org, eranian@...gle.com,
	ak@...ux.intel.com, mark.rutland@....com, adrian.hunter@...el.com,
	dsahern@...il.com, jolsa@...nel.org, namhyung@...nel.org,
	linux-kernel@...r.kernel.org, Kan Liang <kan.liang@...el.com>,
	Andy Lutomirski <luto@...nel.org>
Subject: [PATCH RFC V2 1/1] x86, perf: Add a freq pmu driver

From: Andy Lutomirski <luto@...nel.org>

This patch adds freq PMU to support time and freq related counters
includes TSC, IA32_APERF, IA32_MPERF and IA32_PPERF.

The events are exposed in sysfs for use by perf stat and other tools.
The files are under /sys/devices/freq/events/

These events only support system-wide mode counting.

The PMU type (attr->type) is PERF_TYPE_FREQ.

Example:

To caculate the CPU%
CPU_Utilization = CPU_CLK_UNHALTED.REF_TSC / TSC

$ perf stat -e '{ref-cycles,freq/tsc/}' -C0 -- taskset -c 0 sleep 1
3164023,,ref-cycles,1048387386,100.00
2410812089,,freq/tsc/,1050022373,100.00
The CPU% for sleep is 0.13%.

$ perf stat -e '{ref-cycles,freq/tsc/}' -C0 -- taskset -c 0 busyloop
15662183572,,ref-cycles,6822637855,100.00
15667608992,,freq/tsc/,6823978523,100.00
The CPU% for busy loop is 99.9%.

Signed-off-by: Andy Lutomirski <luto@...nel.org>
Signed-off-by: Kan Liang <kan.liang@...el.com>
---

The patch is based on the patch "x86, perf: Add an aperfmperf driver"
from Andy Lutomirski (https://lkml.org/lkml/2015/4/28/757)

Changes from V1
  - Change the name from aperfmperf to freq
  - Add TSC and PPERF support
  - Change to perf_sw_context
  - Assign new PERF_TYPE name
  - Split stop_or_del to two functions
  - Update state of hw_perf_event
  - Update changlog

 arch/x86/kernel/cpu/Makefile          |   2 +
 arch/x86/kernel/cpu/perf_event_freq.c | 207 ++++++++++++++++++++++++++++++++++
 include/uapi/linux/perf_event.h       |   1 +
 3 files changed, 210 insertions(+)
 create mode 100644 arch/x86/kernel/cpu/perf_event_freq.c

diff --git a/arch/x86/kernel/cpu/Makefile b/arch/x86/kernel/cpu/Makefile
index 9bff687..f621dba 100644
--- a/arch/x86/kernel/cpu/Makefile
+++ b/arch/x86/kernel/cpu/Makefile
@@ -46,6 +46,8 @@ obj-$(CONFIG_PERF_EVENTS_INTEL_UNCORE)	+= perf_event_intel_uncore.o \
 					   perf_event_intel_uncore_snb.o \
 					   perf_event_intel_uncore_snbep.o \
 					   perf_event_intel_uncore_nhmex.o
+obj-$(CONFIG_CPU_SUP_INTEL)		+= perf_event_freq.o
+obj-$(CONFIG_CPU_SUP_AMD)		+= perf_event_freq.o
 endif
 
 
diff --git a/arch/x86/kernel/cpu/perf_event_freq.c b/arch/x86/kernel/cpu/perf_event_freq.c
new file mode 100644
index 0000000..9389b3b
--- /dev/null
+++ b/arch/x86/kernel/cpu/perf_event_freq.c
@@ -0,0 +1,207 @@
+#include <linux/perf_event.h>
+
+enum perf_freq_id {
+	/*
+	 * freq events, generalized by the kernel:
+	 */
+	PERF_FREQ_TSC			= 0,
+	PERF_FREQ_APERF			= 1,
+	PERF_FREQ_MPERF			= 2,
+	PERF_FREQ_PPERF			= 3,
+
+	PERF_FREQ_EVENT_MAX,		/* non-ABI */
+};
+
+struct perf_freq_msr {
+	int	id;
+	u64	msr;
+};
+
+static struct perf_freq_msr freq_msr[] = {
+	{ PERF_FREQ_TSC, 0 },
+	{ PERF_FREQ_APERF, MSR_IA32_APERF },
+	{ PERF_FREQ_MPERF, MSR_IA32_MPERF },
+	{ PERF_FREQ_PPERF, MSR_PPERF },
+};
+
+
+
+PMU_EVENT_ATTR_STRING(tsc, evattr_tsc, "event=0x00");
+PMU_EVENT_ATTR_STRING(aperf, evattr_aperf, "event=0x01");
+PMU_EVENT_ATTR_STRING(mperf, evattr_mperf, "event=0x02");
+PMU_EVENT_ATTR_STRING(pperf, evattr_pperf, "event=0x03");
+
+static struct attribute *events_attrs[PERF_FREQ_EVENT_MAX + 1] = {
+	&evattr_tsc.attr.attr,
+};
+
+static struct attribute_group events_attr_group = {
+	.name = "events",
+	.attrs = events_attrs,
+};
+
+PMU_FORMAT_ATTR(event, "config:0-63");
+static struct attribute *format_attrs[] = {
+	&format_attr_event.attr,
+	NULL,
+};
+static struct attribute_group format_attr_group = {
+	.name = "format",
+	.attrs = format_attrs,
+};
+
+static const struct attribute_group *attr_groups[] = {
+	&events_attr_group,
+	&format_attr_group,
+	NULL,
+};
+
+static int freq_event_init(struct perf_event *event)
+{
+	u64 cfg = event->attr.config;
+
+	if (event->attr.type != event->pmu->type)
+		return -ENOENT;
+
+	if (cfg >= PERF_FREQ_EVENT_MAX)
+		return -EINVAL;
+
+	/* unsupported modes and filters */
+	if (event->attr.exclude_user   ||
+	    event->attr.exclude_kernel ||
+	    event->attr.exclude_hv     ||
+	    event->attr.exclude_idle   ||
+	    event->attr.exclude_host   ||
+	    event->attr.exclude_guest  ||
+	    event->attr.sample_period) /* no sampling */
+		return -EINVAL;
+
+	event->hw.idx = -1;
+	event->hw.event_base = freq_msr[cfg].msr;
+	event->hw.config = cfg;
+
+	return 0;
+}
+
+static inline u64 freq_read_counter(struct perf_event *event)
+{
+	u64 now;
+
+	if (event->hw.event_base)
+		rdmsrl(event->hw.event_base, now);
+	else
+		now = rdtsc();
+
+	return now;
+}
+static void freq_event_update(struct perf_event *event)
+{
+	u64 prev;
+	u64 now;
+
+	/* Assume counters are 64bit */
+	now = freq_read_counter(event);
+	prev = local64_xchg(&event->hw.prev_count, now);
+	local64_add(now - prev, &event->count);
+}
+
+static void freq_event_start(struct perf_event *event, int flags)
+{
+	u64 now;
+
+	now = freq_read_counter(event);
+	local64_set(&event->hw.prev_count, now);
+}
+
+static void freq_event_stop(struct perf_event *event, int flags)
+{
+	struct hw_perf_event *hwc = &event->hw;
+
+	/* mark event as deactivated and stopped */
+	if (!(hwc->state & PERF_HES_STOPPED))
+		hwc->state |= PERF_HES_STOPPED;
+
+	/* check if update of sw counter is necessary */
+	if ((flags & PERF_EF_UPDATE) && !(hwc->state & PERF_HES_UPTODATE)) {
+		freq_event_update(event);
+		hwc->state |= PERF_HES_UPTODATE;
+	}
+}
+
+static void freq_event_del(struct perf_event *event, int flags)
+{
+	freq_event_stop(event, PERF_EF_UPDATE);
+}
+
+static int freq_event_add(struct perf_event *event, int flags)
+{
+	struct hw_perf_event *hwc = &event->hw;
+
+	hwc->state = PERF_HES_UPTODATE | PERF_HES_STOPPED;
+
+	if (flags & PERF_EF_START)
+		freq_event_start(event, flags);
+
+	return 0;
+}
+
+static struct pmu pmu_freq = {
+	.task_ctx_nr	= perf_sw_context,
+	.attr_groups	= attr_groups,
+	.event_init	= freq_event_init,
+	.add		= freq_event_add,
+	.del		= freq_event_del,
+	.start		= freq_event_start,
+	.stop		= freq_event_stop,
+	.read		= freq_event_update,
+	.capabilities	= PERF_PMU_CAP_NO_INTERRUPT,
+};
+
+static int __init intel_freq_specific_init(int idx)
+{
+	/* Skylake has pperf support */
+	if ((boot_cpu_data.x86_model == 78) ||
+	    (boot_cpu_data.x86_model == 94))
+		events_attrs[idx++] = &evattr_pperf.attr.attr;
+
+	events_attrs[idx++] = NULL;
+
+	return 0;
+}
+
+static int __init amd_freq_specific_init(int idx)
+{
+	return 0;
+}
+
+static int __init freq_init(void)
+{
+	int err;
+	int idx = 1;
+
+	if (boot_cpu_has(X86_FEATURE_APERFMPERF)) {
+		events_attrs[idx++] = &evattr_aperf.attr.attr;
+		events_attrs[idx++] = &evattr_mperf.attr.attr;
+	}
+
+	switch (boot_cpu_data.x86_vendor) {
+	case X86_VENDOR_INTEL:
+		err = intel_freq_specific_init(idx);
+		break;
+	case X86_VENDOR_AMD:
+		err = amd_freq_specific_init(idx);
+		break;
+	default:
+		err = -ENOTSUPP;
+	}
+
+	if (err != 0) {
+		pr_cont("no freq PMU driver.\n");
+		return 0;
+	}
+
+	perf_pmu_register(&pmu_freq, "freq", PERF_TYPE_FREQ);
+
+	return 0;
+}
+device_initcall(freq_init);
diff --git a/include/uapi/linux/perf_event.h b/include/uapi/linux/perf_event.h
index d97f84c..1f8c400 100644
--- a/include/uapi/linux/perf_event.h
+++ b/include/uapi/linux/perf_event.h
@@ -32,6 +32,7 @@ enum perf_type_id {
 	PERF_TYPE_HW_CACHE			= 3,
 	PERF_TYPE_RAW				= 4,
 	PERF_TYPE_BREAKPOINT			= 5,
+	PERF_TYPE_FREQ				= 6,
 
 	PERF_TYPE_MAX,				/* non-ABI */
 };
-- 
1.8.3.1

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