linux-kernel - Re: [PATCH] x86: adjust default caching mode translation tables

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Message-ID: <1437517740.3214.247.camel@hp.com>
Date:	Tue, 21 Jul 2015 16:29:00 -0600
From:	Toshi Kani <toshi.kani@...com>
To:	Jan Beulich <JBeulich@...e.com>, mingo@...e.hu, tglx@...utronix.de,
	hpa@...or.com
Cc:	bp@...en.de, linux-kernel@...r.kernel.org
Subject: Re: [PATCH] x86: adjust default caching mode translation tables

On Mon, 2015-07-20 at 08:46 +0100, Jan Beulich wrote:
> Make WT really mean WT (rather than UC).
> 
> I can't see why commit 9cd25aac1f ("x86/mm/pat: Emulate PAT when it is
> disabled") didn't make this match its changes to pat_init().

No, the default values need to be set to the fallback types, i.e. minimal
supported mode.  For WC and WT, UC is the fallback type.

When PAT is disabled, pat_init() does update the tables below to enable WT 
per the default BIOS setup.  However, when PAT is enabled, but CPU has PAT
-errata, WT falls back to UC per the default values. 

Thanks,
-Toshi

> 
> Signed-off-by: Jan Beulich <jbeulich@...e.com>
> Cc: Borislav Petkov <bp@...e.de>
> Cc: Toshi Kani <toshi.kani@...com> 
> ---
>  arch/x86/mm/init.c |    6 +++---
>  1 file changed, 3 insertions(+), 3 deletions(-)
> 
> --- 4.2-rc3/arch/x86/mm/init.c
> +++ 4.2-rc3-x86-default-cache-mode/arch/x86/mm/init.c
> @@ -43,18 +43,18 @@ uint16_t __cachemode2pte_tbl[_PAGE_CACHE
>  	[_PAGE_CACHE_MODE_WC      ]	= 0         | _PAGE_PCD,
>  	[_PAGE_CACHE_MODE_UC_MINUS]	= 0         | _PAGE_PCD,
>  	[_PAGE_CACHE_MODE_UC      ]	= _PAGE_PWT | _PAGE_PCD,
> -	[_PAGE_CACHE_MODE_WT      ]	= 0         | _PAGE_PCD,
> +	[_PAGE_CACHE_MODE_WT      ]	= _PAGE_PWT | 0,
>  	[_PAGE_CACHE_MODE_WP      ]	= 0         | _PAGE_PCD,
>  };
>  EXPORT_SYMBOL(__cachemode2pte_tbl);
>  
>  uint8_t __pte2cachemode_tbl[8] = {
>  	[__pte2cm_idx( 0        | 0         | 0        )] = 
> _PAGE_CACHE_MODE_WB,
> -	[__pte2cm_idx(_PAGE_PWT | 0         | 0        )] = 
> _PAGE_CACHE_MODE_UC_MINUS,
> +	[__pte2cm_idx(_PAGE_PWT | 0         | 0        )] = 
> _PAGE_CACHE_MODE_WT,
>  	[__pte2cm_idx( 0        | _PAGE_PCD | 0        )] = 
> _PAGE_CACHE_MODE_UC_MINUS,
>  	[__pte2cm_idx(_PAGE_PWT | _PAGE_PCD | 0        )] = 
> _PAGE_CACHE_MODE_UC,
>  	[__pte2cm_idx( 0        | 0         | _PAGE_PAT)] = 
> _PAGE_CACHE_MODE_WB,
> -	[__pte2cm_idx(_PAGE_PWT | 0         | _PAGE_PAT)] = 
> _PAGE_CACHE_MODE_UC_MINUS,
> +	[__pte2cm_idx(_PAGE_PWT | 0         | _PAGE_PAT)] = 
> _PAGE_CACHE_MODE_WT,
>  	[__pte2cm_idx(0         | _PAGE_PCD | _PAGE_PAT)] = 
> _PAGE_CACHE_MODE_UC_MINUS,
>  	[__pte2cm_idx(_PAGE_PWT | _PAGE_PCD | _PAGE_PAT)] = 
> _PAGE_CACHE_MODE_UC,
>  };
> 
> 
> 
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