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Message-ID: <1437577776.3214.252.camel@hp.com>
Date: Wed, 22 Jul 2015 09:09:36 -0600
From: Toshi Kani <toshi.kani@...com>
To: tglx@...utronix.de, linux-kernel@...r.kernel.org,
jbeulich@...e.com, hpa@...or.com, peterz@...radead.org,
mingo@...nel.org, bp@...e.de, luto@...capital.net,
torvalds@...ux-foundation.org, linux-tip-commits@...r.kernel.org
Subject: Re: [tip:x86/urgent] x86/mm/pat: Adjust default caching mode
translation tables
Ingo,
Please drop this change as I explained below.
http://marc.info/?l=linux-kernel&m=143751782107284&w=2
Thanks,
-Toshi
On Tue, 2015-07-21 at 02:38 -0700, tip-bot for Jan Beulich wrote:
> Commit-ID: ca1fec58bc6a90be96a59b4769e951156846c6ca
> Gitweb:
> http://git.kernel.org/tip/ca1fec58bc6a90be96a59b4769e951156846c6ca
> Author: Jan Beulich <JBeulich@...e.com>
> AuthorDate: Mon, 20 Jul 2015 08:46:14 +0100
> Committer: Ingo Molnar <mingo@...nel.org>
> CommitDate: Tue, 21 Jul 2015 08:23:06 +0200
>
> x86/mm/pat: Adjust default caching mode translation tables
>
> Make WT really mean WT (rather than UC).
>
> I can't see why commit 9cd25aac1f ("x86/mm/pat: Emulate PAT when
> it is disabled") didn't make this to match its changes to
> pat_init().
>
> Signed-off-by: Jan Beulich <jbeulich@...e.com>
> Cc: Andy Lutomirski <luto@...capital.net>
> Cc: Borislav Petkov <bp@...e.de>
> Cc: Linus Torvalds <torvalds@...ux-foundation.org>
> Cc: Peter Zijlstra <peterz@...radead.org>
> Cc: Thomas Gleixner <tglx@...utronix.de>
> Cc: Toshi Kani <toshi.kani@...com>
> Link:
> http://lkml.kernel.org/r/55ACC3660200007800092E62@mail.emea.novell.com
> Signed-off-by: Ingo Molnar <mingo@...nel.org>
> ---
> arch/x86/mm/init.c | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/arch/x86/mm/init.c b/arch/x86/mm/init.c
> index 8533b46..7a45322 100644
> --- a/arch/x86/mm/init.c
> +++ b/arch/x86/mm/init.c
> @@ -43,18 +43,18 @@ uint16_t __cachemode2pte_tbl[_PAGE_CACHE_MODE_NUM] =
> {
> [_PAGE_CACHE_MODE_WC ] = 0 | _PAGE_PCD,
> [_PAGE_CACHE_MODE_UC_MINUS] = 0 | _PAGE_PCD,
> [_PAGE_CACHE_MODE_UC ] = _PAGE_PWT | _PAGE_PCD,
> - [_PAGE_CACHE_MODE_WT ] = 0 | _PAGE_PCD,
> + [_PAGE_CACHE_MODE_WT ] = _PAGE_PWT | 0,
> [_PAGE_CACHE_MODE_WP ] = 0 | _PAGE_PCD,
> };
> EXPORT_SYMBOL(__cachemode2pte_tbl);
>
> uint8_t __pte2cachemode_tbl[8] = {
> [__pte2cm_idx( 0 | 0 | 0 )] =
> _PAGE_CACHE_MODE_WB,
> - [__pte2cm_idx(_PAGE_PWT | 0 | 0 )] =
> _PAGE_CACHE_MODE_UC_MINUS,
> + [__pte2cm_idx(_PAGE_PWT | 0 | 0 )] =
> _PAGE_CACHE_MODE_WT,
> [__pte2cm_idx( 0 | _PAGE_PCD | 0 )] =
> _PAGE_CACHE_MODE_UC_MINUS,
> [__pte2cm_idx(_PAGE_PWT | _PAGE_PCD | 0 )] =
> _PAGE_CACHE_MODE_UC,
> [__pte2cm_idx( 0 | 0 | _PAGE_PAT)] =
> _PAGE_CACHE_MODE_WB,
> - [__pte2cm_idx(_PAGE_PWT | 0 | _PAGE_PAT)] =
> _PAGE_CACHE_MODE_UC_MINUS,
> + [__pte2cm_idx(_PAGE_PWT | 0 | _PAGE_PAT)] =
> _PAGE_CACHE_MODE_WT,
> [__pte2cm_idx(0 | _PAGE_PCD | _PAGE_PAT)] =
> _PAGE_CACHE_MODE_UC_MINUS,
> [__pte2cm_idx(_PAGE_PWT | _PAGE_PCD | _PAGE_PAT)] =
> _PAGE_CACHE_MODE_UC,
> };
--
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