linux-kernel - Re: [RFC][PATCH] perf tests: Add Intel CQM and arch tests

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [day] [month] [year] [list]

Date:	Wed, 22 Jul 2015 23:18:51 +0100
From:	Matt Fleming <matt@...eblueprint.co.uk>
To:	Jiri Olsa <jolsa@...hat.com>
Cc:	Arnaldo Carvalho de Melo <acme@...hat.com>,
	linux-kernel@...r.kernel.org, Ingo Molnar <mingo@...nel.org>,
	Andi Kleen <andi@...stfloor.org>,
	Vince Weaver <vince@...ter.net>,
	Matt Fleming <matt.fleming@...el.com>,
	Peter Zijlstra <peterz@...radead.org>
Subject: Re: [RFC][PATCH] perf tests: Add Intel CQM and arch tests

On Wed, 22 Jul, at 03:24:44PM, Jiri Olsa wrote:
> On Wed, Jul 22, 2015 at 11:38:59AM +0100, Matt Fleming wrote:
> > From: Matt Fleming <matt.fleming@...el.com>
> > 
> > Peter reports that it's possible to trigger a WARN_ON_ONCE() in the
> > Intel CQM code by combining a hardware event and an Intel CQM (software)
> > event into a group. Unfortunately, the perf tools are not able to create
> > this bundle and we need to manually construct a test case.
> > 
> > For posterity, record Peter's proof of concept test case in tools/perf
> > so that it presents a model for how we can perform architecture-specific
> > tests, or "arch tests", in perf in the future.
> > 
> > The particular issue triggered in the test case is that when the counter
> > for the hardware event overflows and triggers a PMI we'll read both the
> > hardware event and the software event counters. Unfortunately, for CQM
> > that involves performing an IPI to read the CQM event counters on all
> > sockets, which in NMI context triggers the WARN_ON_ONCE().
> > 
> > This patch is marked as RFC because I'd really like to solicit opinions
> > on this approach and hear feedback on whether this is the correct way to
> > structure these arch tests. I realise that we've already got tests for
> > the TSC, etc that are x86-specific but I didn't want to change the order
> > of the tests (say, by moving test__perf_time_to_tsc() into ARCH_TESTS)
> > in case that broke some kind of ABI.
> 
> I wouldn't consider the order of tests being ABI,
> let's break it and watch ;-)

OK, that at least allows me to perform a litte more surgery on the
current tests.

> > diff --git a/tools/perf/arch/x86/include/arch-tests.h b/tools/perf/arch/x86/include/arch-tests.h
> > new file mode 100644
> > index 000000000000..9d43f759e014
> > --- /dev/null
> > +++ b/tools/perf/arch/x86/include/arch-tests.h
> > @@ -0,0 +1,13 @@
> > +#ifndef ARCH_TESTS_H
> > +#define ARCH_TESTS_H
> > +
> > +/* Tests */
> > +int test__intel_cqm_count_nmi_context(void);
> > +
> > +#define ARCH_TESTS						\
> > +	{							\
> > +		.desc = "Test intel cqm nmi context read",	\
> > +		.func = test__intel_cqm_count_nmi_context,	\
> > +	},
> > +
> 
> hum, I dont like much this being stuffed in macro,
> but dont have any technical reason against ;-)
> 
> maybe we could add 'struct test arch_tests[]' array, that'd be
> initialized by each arch and executed in addition to the current
> 'struct test tests[]'

Makes sense to me. I'll take that approach. Thanks.

-- 
Matt Fleming, Intel Open Source Technology Center
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/