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Message-ID: <CACRpkdagO0DhB_1KLcKDPJ9RoKx=aiUMLMX59bZOXkA4PcN8cg@mail.gmail.com>
Date: Mon, 27 Jul 2015 14:04:38 +0200
From: Linus Walleij <linus.walleij@...aro.org>
To: Maxime Ripard <maxime.ripard@...e-electrons.com>
Cc: Hans de Goede <hdegoede@...hat.com>, Chen-Yu Tsai <wens@...e.org>,
"linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"linux-gpio@...r.kernel.org" <linux-gpio@...r.kernel.org>
Subject: Re: [PATCH 3/4] pinctrl: sunxi: Add custom irq_domain_ops
On Mon, Jul 20, 2015 at 2:41 PM, Maxime Ripard
<maxime.ripard@...e-electrons.com> wrote:
> The current interrupt parsing code was working by accident, because the
> default was actually parsing the first node of interrupts.
>
> While that was mostly working (and the flags were actually ignored), this
> binding has never been documented, and doesn't work with SoCs that have
> multiple interrupt banks anyway.
>
> Add a proper interrupt xlate function, that uses the same description than
> the GPIOs (<bank> <pin> <flags>), that will make things less confusing.
>
> The EINT number will still be used as the hwirq number, but won't be
> exposed through the DT.
>
> Signed-off-by: Maxime Ripard <maxime.ripard@...e-electrons.com>
This patch does not apply to the pinctrl devel branch.
Does it need to be rebased or do I need to merge in fixes?
Holding patch 3/4 and 4/4 until this is resolved.
Yours,
Linus Walleij
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